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Message-ID: <0c10b451-792d-4f71-943e-16511f9d2a3d@quicinc.com>
Date: Tue, 18 Jun 2024 16:57:38 +0800
From: Tengfei Fan <quic_tengfan@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
CC: <andersson@...nel.org>, <konrad.dybcio@...aro.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <kernel@...cinc.com>,
Qiang Yu <quic_qianyu@...cinc.com>,
Ziyue Zhang
<quic_ziyuzhan@...cinc.com>
Subject: Re: [PATCH v10 4/4] arm64: dts: qcom: aim300: add AIM300 AIoT
On 6/18/2024 4:48 PM, Dmitry Baryshkov wrote:
> On Tue, Jun 18, 2024 at 03:22:02PM GMT, Tengfei Fan wrote:
>> Add AIM300 AIoT Carrier board DTS support, including usb, UART, PCIe,
>> I2C functions support.
>> Here is a diagram of AIM300 AIoT Carrie Board and SoM
>> +--------------------------------------------------+
>> | AIM300 AIOT Carrier Board |
>> | |
>> | +-----------------+ |
>> |power----->| Fixed regulator |---------+ |
>> | +-----------------+ | |
>> | | |
>> | v VPH_PWR |
>> | +----------------------------------------------+ |
>> | | AIM300 SOM | | |
>> | | |VPH_PWR | |
>> | | v | |
>> | | +-------+ +--------+ +------+ | |
>> | | | UFS | | QCS8550| |PMIC | | |
>> | | +-------+ +--------+ +------+ | |
>> | | | |
>> | +----------------------------------------------+ |
>> | |
>> | +----+ +------+ |
>> | |USB | | UART | |
>> | +----+ +------+ |
>> +--------------------------------------------------+
>>
>> Co-developed-by: Qiang Yu <quic_qianyu@...cinc.com>
>> Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
>> Co-developed-by: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
>> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
>> Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/Makefile | 1 +
>> .../boot/dts/qcom/qcs8550-aim300-aiot.dts | 315 ++++++++++++++++++
>> 2 files changed, 316 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
>>
>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>> index 0c1cebd16649..5576c7d6ea06 100644
>> --- a/arch/arm64/boot/dts/qcom/Makefile
>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>> @@ -102,6 +102,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb
>> +dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += qrb2210-rb1.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += qrb4210-rb2.dtb
>> diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts b/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
>> new file mode 100644
>> index 000000000000..d4fb10149e66
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
>> @@ -0,0 +1,315 @@
>> +// SPDX-License-Identifier: BSD-3-Clause
>> +/*
>> + * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/leds/common.h>
>> +#include "qcs8550-aim300.dtsi"
>> +#include "pm8010.dtsi"
>> +#include "pmr735d_a.dtsi"
>> +#include "pmr735d_b.dtsi"
>> +
>> +/ {
>> + model = "Qualcomm Technologies, Inc. QCS8550 AIM300 AIOT";
>> + compatible = "qcom,qcs8550-aim300-aiot", "qcom,qcs8550-aim300", "qcom,qcs8550",
>> + "qcom,sm8550";
>> +
>> + aliases {
>> + serial0 = &uart7;
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial0:115200n8";
>> + };
>> +
>> + gpio-keys {
>> + compatible = "gpio-keys";
>> +
>> + pinctrl-0 = <&volume_up_n>;
>> + pinctrl-names = "default";
>> +
>> + key-volume-up {
>> + label = "Volume Up";
>> + debounce-interval = <15>;
>> + gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
>> + linux,code = <KEY_VOLUMEUP>;
>> + linux,can-disable;
>> + wakeup-source;
>> + };
>> + };
>> +
>> + pmic-glink {
>> + compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + orientation-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
>> +
>> + connector@0 {
>> + compatible = "usb-c-connector";
>> + reg = <0>;
>> + power-role = "dual";
>> + data-role = "dual";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + pmic_glink_hs_in: endpoint {
>> + remote-endpoint = <&usb_1_dwc3_hs>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> +
>> + pmic_glink_ss_in: endpoint {
>> + remote-endpoint = <&redriver_ss_out>;
>> + };
>> + };
>> +
>> + port@2 {
>> + reg = <2>;
>> +
>> + pmic_glink_sbu: endpoint {
>> + remote-endpoint = <&fsa4480_sbu_mux>;
>> + };
>> + };
>> + };
>> + };
>> + };
>> +
>> + vph_pwr: regulator-vph-pwr {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vph_pwr";
>> + regulator-min-microvolt = <3700000>;
>> + regulator-max-microvolt = <3700000>;
>> +
>> + regulator-always-on;
>> + regulator-boot-on;
>> + };
>> +};
>> +
>> +&apps_rsc {
>> + regulators-0 {
>> + vdd-bob1-supply = <&vph_pwr>;
>> + vdd-bob2-supply = <&vph_pwr>;
>> + };
>> +
>> + regulators-3 {
>> + vdd-s4-supply = <&vph_pwr>;
>> + vdd-s5-supply = <&vph_pwr>;
>> + };
>> +
>> + regulators-4 {
>> + vdd-s4-supply = <&vph_pwr>;
>> + };
>> +
>> + regulators-5 {
>> + vdd-s1-supply = <&vph_pwr>;
>> + vdd-s2-supply = <&vph_pwr>;
>> + vdd-s3-supply = <&vph_pwr>;
>> + vdd-s4-supply = <&vph_pwr>;
>> + vdd-s5-supply = <&vph_pwr>;
>> + vdd-s6-supply = <&vph_pwr>;
>> + };
>> +};
>> +
>> +&i2c_hub_2 {
>> + status = "okay";
>> +
>> + typec-mux@42 {
>> + compatible = "fcs,fsa4480";
>> + reg = <0x42>;
>> +
>> + vcc-supply = <&vreg_bob1>;
>> +
>> + mode-switch;
>> + orientation-switch;
>> +
>> + port {
>> + fsa4480_sbu_mux: endpoint {
>> + remote-endpoint = <&pmic_glink_sbu>;
>> + };
>> + };
>> + };
>> +
>> + typec-retimer@1c {
>> + compatible = "onnn,nb7vpq904m";
>> + reg = <0x1c>;
>> +
>> + vcc-supply = <&vreg_l15b_1p8>;
>> +
>> + orientation-switch;
>> + retimer-switch;
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + redriver_ss_out: endpoint {
>> + remote-endpoint = <&pmic_glink_ss_in>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> +
>> + redriver_ss_in: endpoint {
>> + data-lanes = <3 2 1 0>;
>> + remote-endpoint = <&usb_dp_qmpphy_out>;
>> + };
>> + };
>> + };
>> + };
>> +};
>> +
>> +&mdss_dsi0 {
>> + status = "okay";
>> +
>> + panel@0 {
>> + compatible = "visionox,vtdr6130";
>> + reg = <0>;
>> +
>> + pinctrl-0 = <&dsi_active>, <&te_default>;
>> + pinctrl-1 = <&dsi_suspend>, <&te_default>;
>> + pinctrl-names = "default", "sleep";
>> +
>> + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
>> +
>> + vci-supply = <&vreg_l13b_3p0>;
>> + vdd-supply = <&vreg_l11b_1p2>;
>> + vddio-supply = <&vreg_l12b_1p8>;
>> +
>> + port {
>> + panel0_in: endpoint {
>> + remote-endpoint = <&mdss_dsi0_out>;
>> + };
>> + };
>> + };
>> +};
>> +
>> +&mdss_dsi0_out {
>> + remote-endpoint = <&panel0_in>;
>> + data-lanes = <0 1 2 3>;
>> +};
>> +
>> +&mdss_dsi0_phy {
>> + status = "okay";
>> +};
>> +
>> +&pcie0 {
>> + status = "okay";
>> +};
>> +
>> +&pcie0_phy {
>> + status = "okay";
>> +};
>> +
>> +&pcie1 {
>> + status = "okay";
>> +};
>> +
>> +&pcie1_phy {
>> + status = "okay";
>> +};
>> +
>> +&pm8550_gpios {
>> + volume_up_n: volume-up-n-state {
>> + pins = "gpio6";
>> + function = "normal";
>> + power-source = <1>;
>> + bias-pull-up;
>> + input-enable;
>> + };
>> +};
>> +
>> +&pon_pwrkey {
>> + status = "okay";
>> +};
>> +
>> +&pon_resin {
>> + linux,code = <KEY_VOLUMEDOWN>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&qupv3_id_0 {
>> + status = "okay";
>> +};
>> +
>> +&remoteproc_adsp {
>> + firmware-name = "qcom/qcs8550/adsp.mbn",
>> + "qcom/qcs8550/adsp_dtbs.mbn";
>
> adsp_dtb.mbn, not _dtbs.mbn.
>
> https://lore.kernel.org/linux-arm-msm/s5gt3p6zsd5ebrkop4dhd33tykln33f6ahu3pibymecxsmakyd@lg5wfgec6dat/
Previously, I observed different names in the comments and the patch,
and I initially think that "_dtb" is a clerical error. However, I now
realize that this is my mistake, and I will update "_dtbs" with "_dtb"
in the next verion patch series.
>
>> + status = "okay";
>> +};
>> +
>> +&remoteproc_cdsp {
>> + firmware-name = "qcom/qcs8550/cdsp.mbn",
>> + "qcom/qcs8550/cdsp_dtbs.mbn";
>> + status = "okay";
>> +};
>> +
>> +&swr1 {
>> + status = "okay";
>> +};
>> +
>> +&swr2 {
>> + status = "okay";
>> +};
>> +
>> +&tlmm {
>> + gpio-reserved-ranges = <32 8>;
>> +
>> + dsi_active: dsi-active-state {
>> + pins = "gpio133";
>> + function = "gpio";
>> + drive-strength = <8>;
>> + bias-disable;
>> + };
>> +
>> + dsi_suspend: dsi-suspend-state {
>> + pins = "gpio133";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-pull-down;
>> + };
>> +
>> + te_default: te-default-state {
>> + pins = "gpio86";
>> + function = "mdp_vsync";
>> + drive-strength = <2>;
>> + bias-pull-down;
>> + };
>> +};
>> +
>> +&uart7 {
>> + status = "okay";
>> +};
>> +
>> +&usb_1 {
>> + status = "okay";
>> +};
>> +
>> +&usb_1_dwc3_hs {
>> + remote-endpoint = <&pmic_glink_hs_in>;
>> +};
>> +
>> +&usb_1_hsphy {
>> + status = "okay";
>> +};
>> +
>> +&usb_dp_qmpphy {
>> + status = "okay";
>> +};
>> +
>> +&usb_dp_qmpphy_out {
>> + remote-endpoint = <&redriver_ss_in>;
>> +};
>> --
>> 2.25.1
>>
>
--
Thx and BRs,
Tengfei Fan
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