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Date: Wed, 19 Jun 2024 13:46:40 +0800
From: Shan-Chun Hung <shanchun1218@...il.com>
To: ulf.hansson@...aro.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
adrian.hunter@...el.com,
p.zabel@...gutronix.de,
pbrobinson@...il.com,
serghox@...il.com,
mcgrof@...nel.org,
prabhakar.mahadev-lad.rj@...renesas.com,
forbidden405@...look.com,
tmaimon77@...il.com,
andy.shevchenko@...il.com,
linux-arm-kernel@...ts.infradead.org,
linux-mmc@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: ychuang3@...oton.com,
schung@...oton.com,
Shan-Chun Hung <shanchun1218@...il.com>
Subject: [PATCH 1/2] dt-bindings: mmc: nuvoton,ma35d1-sdhci: Document MA35D1 SDHCI controller
Add binding for Nuvoton MA35D1 SDHCI controller.
Signed-off-by: schung <schung@...oton.com>
---
.../bindings/mmc/nuvoton,ma35d1-sdhci.yaml | 106 ++++++++++++++++++
1 file changed, 106 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mmc/nuvoton,ma35d1-sdhci.yaml
diff --git a/Documentation/devicetree/bindings/mmc/nuvoton,ma35d1-sdhci.yaml b/Documentation/devicetree/bindings/mmc/nuvoton,ma35d1-sdhci.yaml
new file mode 100644
index 000000000000..173449360dea
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/nuvoton,ma35d1-sdhci.yaml
@@ -0,0 +1,106 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mmc/nuvoton,ma35d1-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton MA35D1 SD/SDIO/MMC Controller
+
+maintainers:
+ - Shan-Chun Hung <shanchun1218@...il.com>
+
+description: |
+ This controller on Nuvoton MA35 family SoCs provides an interface for MMC, SD, and
+ SDIO types of memory cards.
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - nuvoton,ma35d1-sdhci
+ reg:
+ maxItems: 1
+ description: The SDHCI registers
+
+ interrupts:
+ maxItems: 1
+
+ pinctrl-names:
+ description:
+ Should at least contain default and state_uhs.
+ minItems: 1
+ items:
+ - const: default
+ - const: state_uhs
+
+ pinctrl-0:
+ description:
+ Should contain default/high speed pin ctrl.
+ maxItems: 1
+
+ pinctrl-1:
+ description:
+ Should contain uhs mode pin ctrl.
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ description: The SDHCI bus clock
+
+ resets:
+ maxItems: 1
+ description:
+ Phandle and reset specifier pair to softreset line of sdhci.
+
+ nuvoton,sys:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the syscon that configure sdhci votage stable
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - pinctrl-names
+ - pinctrl-0
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+ #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ sdhci0: sdhci@...80000 {
+ compatible = "nuvoton,ma35d1-sdhci";
+ reg = <0x0 0x40180000 0x0 0x2000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk SDH0_GATE>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhci0>;
+ bus-width = <4>;
+ max-frequency = <100000000>;
+ no-1-8-v;
+ status = "disabled";
+ };
+
+ sdhci1: sdhci@...90000 {
+ compatible = "nuvoton,ma35d1-sdhci";
+ reg = <0x0 0x40190000 0x0 0x2000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk SDH1_GATE>;
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&pinctrl_sdhci1>;
+ pinctrl-1 = <&pinctrl_sdhci1_uhs>;
+ resets = <&sys MA35D1_RESET_SDH1>;
+ nuvoton,sys = <&sys>;
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ status = "disabled";
+ };
+ };
--
2.25.1
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