linux-kernel - Re: [PATCH v2, 2/3] usb: dwc3: core: add p3p2tranok quirk

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Message-ID: <CAMtoTm0S2WSO6VxK79DkTs+1aq5xBYBMRsPXWAFuWo4DoymUEw@mail.gmail.com>
Date: Wed, 19 Jun 2024 19:56:13 +0800
From: joswang <joswang1221@...il.com>
To: Thinh Nguyen <Thinh.Nguyen@...opsys.com>
Cc: "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org" <krzk+dt@...nel.org>, 
	"conor+dt@...nel.org" <conor+dt@...nel.org>, 
	"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>, 
	"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>, 
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "balbi@...nel.org" <balbi@...nel.org>, 
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, joswang <joswang@...ovo.com>
Subject: Re: [PATCH v2, 2/3] usb: dwc3: core: add p3p2tranok quirk

Hi Thinh

The workaround solution provided by your company for this issue is as follows:
  Workaround：if the phy support direct P3 to P2 transition，program
GUSB3PIPECTL.P3P2Tranok=1

As the databook mentions:
This bit is used only for some non-Synopsys PHYs that cannot do LFPS in P3.
This bit is used by third-party SS PHY. It must be set to '0' for Synopsys PHY.

For Synopsys PHY, if this bit is set to "1", will it cause unknown problems?
Please help confirm this, thank you!

Thanks,
Jos Wang