linux-kernel - RE: [PATCH v4 09/11] cpufreq: amd-pstate: implement heterogeneous core topology for highest performance initialization

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Message-ID:
 <CYYPR12MB86558EDF651234DBBF002EFE9CCF2@CYYPR12MB8655.namprd12.prod.outlook.com>
Date: Wed, 19 Jun 2024 03:25:36 +0000
From: "Yuan, Perry" <Perry.Yuan@....com>
To: Borislav Petkov <bp@...en8.de>
CC: "rafael.j.wysocki@...el.com" <rafael.j.wysocki@...el.com>, "Limonciello,
 Mario" <Mario.Limonciello@....com>, "viresh.kumar@...aro.org"
	<viresh.kumar@...aro.org>, "Huang, Ray" <Ray.Huang@....com>, "Shenoy, Gautham
 Ranjal" <gautham.shenoy@....com>, "Deucher, Alexander"
	<Alexander.Deucher@....com>, "Huang, Shimmer" <Shimmer.Huang@....com>, "Du,
 Xiaojian" <Xiaojian.Du@....com>, "Meng, Li (Jassmine)" <Li.Meng@....com>,
	"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v4 09/11] cpufreq: amd-pstate: implement heterogeneous
 core topology for highest performance initialization

[AMD Official Use Only - AMD Internal Distribution Only]

Hi Boris,

> -----Original Message-----
> From: Borislav Petkov <bp@...en8.de>
> Sent: Wednesday, June 19, 2024 5:24 AM
> To: Yuan, Perry <Perry.Yuan@....com>
> Cc: rafael.j.wysocki@...el.com; Limonciello, Mario
> <Mario.Limonciello@....com>; viresh.kumar@...aro.org; Huang, Ray
> <Ray.Huang@....com>; Shenoy, Gautham Ranjal
> <gautham.shenoy@....com>; Deucher, Alexander
> <Alexander.Deucher@....com>; Huang, Shimmer
> <Shimmer.Huang@....com>; Du, Xiaojian <Xiaojian.Du@....com>; Meng,
> Li (Jassmine) <Li.Meng@....com>; linux-pm@...r.kernel.org; linux-
> kernel@...r.kernel.org
> Subject: Re: [PATCH v4 09/11] cpufreq: amd-pstate: implement
> heterogeneous core topology for highest performance initialization
>
> On Mon, Jun 17, 2024 at 02:59:11PM +0800, Perry Yuan wrote:
> > Introduces an optimization to the AMD-Pstate driver by implementing a
> > heterogeneous core topology for the initialization of the highest
> > performance value while driver loading.
> > The two core types supported are "performance" and "efficiency".
> > Each core type has different highest performance and frequency values
> > configured by the platform.  The `amd_pstate` driver needs to identify
> > the type of core to correctly set an appropriate highest perf value.
> >
> > X86_FEATURE_HETERO_CORE_TOPOLOGY is used to identify whether the
> > processor support heterogeneous core type by reading CPUID leaf
> > Fn_0x80000026_EAX and bit 30. if the bit is set as one, then
> > amd_pstate driver will check EBX 30:28 bits to get the core type.
>
> There will be a special ->cpu_type member for that eventually:
>
> https://lore.kernel.org/r/20240617-add-cpu-type-v1-1-
> b88998c01e76@...ux.intel.com

 Great, I saw your comments in that patchset, hopefully Intel and AMD can have a common design for the core type.
 Feel free to let me know if you want me to try any testing patches.


>
> --
> Regards/Gruss,
>     Boris.
>
> https://people.kernel.org/tglx/notes-about-netiquette