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Message-ID: <20240620-pregame-statute-2b43c0547064@spud>
Date: Thu, 20 Jun 2024 17:30:12 +0100
From: Conor Dooley <conor@...nel.org>
To: Drew Fustini <dfustini@...storrent.com>
Cc: Jisheng Zhang <jszhang@...nel.org>, Guo Ren <guoren@...nel.org>,
	Fu Wei <wefu@...hat.com>, Yangtao Li <frank.li@...o.com>,
	Thomas Bonnefille <thomas.bonnefille@...tlin.com>,
	Emil Renner Berthing <emil.renner.berthing@...onical.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, linux-riscv@...ts.infradead.org,
	linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/6] clk: thead: Add support for TH1520 AP_SUBSYS clock
 controller

On Wed, Jun 19, 2024 at 11:15:06AM -0700, Drew Fustini wrote:
> On Wed, Jun 19, 2024 at 12:12:30PM +0100, Conor Dooley wrote:
> > On Sat, Jun 15, 2024 at 06:54:29PM -0700, Drew Fustini wrote:
> > > This series adds support for the AP sub-system clock controller in the
> > > T-Head TH1520 [1]. Yangtao Li originally submitted this series in May
> > > 2023 [2]. Jisheng made additional improvements and then passed on the
> > > work in progress to me.
> > 
> > One thing I noticed on the dts side is that the GPIO controllers have no
> > clocks provided. Does the AP sub-system clock controller provide their
> > clocks too?
> 
> Good question. I see that dwapb_get_clks() in drivers/gpio/gpio-dwapb.c
> does call devm_clk_bulk_get_optional() for "bus" and "db". There doesn't
> seem to be to many in-tree examples of clocks being defined for gpio
> controllers with compatible "snps,dw-apb-gpio", but I do see that
> k210.dtsi defines K210_CLK_APB0 for "bus" and K210_CLK_GPIO for "db".
> 
> From the TH1520 System User Manual, I do see the gpio related clocks in
> Section 4.4.2.2 AP_SUBSYS. The peripheral clock gate control register
> (PERI_CLK_CFG) has:
> 
> Bit 20: GPIO3_CLK_EN
> Bit  8: GPIO0_CLK_EN
> Bit  7: GPIO1_CLK_EN
> Bit  6: GPIO2_CLK_EN
> 
> I will add these gates to the clk-th1520-ap.c and reference them from
> the gpio controller nodes.
> 
> Since each gpio controller will only have one clock, do you think I can
> omit the clock-names property?

Sure, thanks for looking into this.

> 
> Thanks,
> Drew
> 
> Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs

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