lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <b747f841-7520-4fee-9a1f-f3215203e138@lunn.ch>
Date: Thu, 20 Jun 2024 21:30:40 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Bartosz Golaszewski <brgl@...ev.pl>
Cc: Vinod Koul <vkoul@...nel.org>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Jose Abreu <joabreu@...opsys.com>,
	"David S . Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
	linux-arm-msm@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Subject: Re: [PATCH net-next 8/8] net: stmmac: qcom-ethqos: add a DMA-reset
 quirk for sa8775p-ride-r3

On Thu, Jun 20, 2024 at 10:20:08AM +0200, Bartosz Golaszewski wrote:
> On Wed, Jun 19, 2024 at 9:33 PM Andrew Lunn <andrew@...n.ch> wrote:
> >
> > On Wed, Jun 19, 2024 at 08:45:49PM +0200, Bartosz Golaszewski wrote:
> > > From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> > >
> > > On sa8775p-ride the RX clocks from the AQR115C PHY are not available at
> > > the time of the DMA reset so we need to loop TX clocks to RX and then
> > > disable loopback after link-up. Use the provided callbacks to do it for
> > > this board.
> >
> > How does this differ to ethqos_clks_config()?
> >
> 
> I'm not sure I understand the question. This function is called at
> probe/remove and suspend/resume. It's not linked to the issue solved
> here.

		/* Enable functional clock to prevent DMA reset to timeout due
		 * to lacking PHY clock after the hardware block has been power
		 * cycled. The actual configuration will be adjusted once
		 * ethqos_fix_mac_speed() is invoked.

It sounds similar, "DMA reset", "lacking PHY clock".

There is also

commit 58329b03a5957904fa2b33b3824ed19e7b42c9e9
Author: Romain Gantois <romain.gantois@...tlin.com>
Date:   Tue Mar 26 14:32:11 2024 +0100

    net: stmmac: Signal to PHY/PCS drivers to keep RX clock on
    
    There is a reocurring issue with stmmac controllers where the MAC fails to
    initialize its hardware if an RX clock signal isn't provided on the MAC/PHY
    link.
    
    This causes issues when PHY or PCS devices either go into suspend while
    cutting the RX clock or do not bring the clock signal up early enough for
    the MAC to initialize successfully.
    
    Set the mac_requires_rxc flag in the stmmac phylink config so that PHY/PCS
    drivers know to keep the RX clock up at all times.

It would be good to explain the big pictures, why these two changes
are not sufficient.

    Andrew

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ