linux-kernel - Re: [PATCH v6 1/2] clk: qcom: gcc-ipq6018: update sdcc max clock frequency

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Message-ID: <gps5nwdwhf2mnjfvae7gnnahtiu53tkqkoqsip75xfrabls7b6@zhmhihx7vhxo>
Date: Fri, 21 Jun 2024 01:02:10 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Chukun Pan <amadeus@....edu.cn>, 
	Sricharan Ramabadhran <quic_srichara@...cinc.com>
Cc: Bjorn Andersson <andersson@...nel.org>, 
	Konrad Dybcio <konrad.dybcio@...aro.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v6 1/2] clk: qcom: gcc-ipq6018: update sdcc max clock
 frequency

On Thu, Jun 20, 2024 at 11:01:21PM GMT, Chukun Pan wrote:
> The mmc controller of the IPQ6018 does not support HS400 mode.
> So adjust the maximum clock frequency of sdcc to 200 MHz (HS200).
> 
> Signed-off-by: Chukun Pan <amadeus@....edu.cn>

Fixes?

> ---
>  drivers/clk/qcom/gcc-ipq6018.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/qcom/gcc-ipq6018.c b/drivers/clk/qcom/gcc-ipq6018.c
> index 7e69de34c310..6c764e3e2665 100644
> --- a/drivers/clk/qcom/gcc-ipq6018.c
> +++ b/drivers/clk/qcom/gcc-ipq6018.c
> @@ -1617,7 +1617,7 @@ static const struct freq_tbl ftbl_sdcc_apps_clk_src[] = {
>  	F(96000000, P_GPLL2, 12, 0, 0),
>  	F(177777778, P_GPLL0, 4.5, 0, 0),
>  	F(192000000, P_GPLL2, 6, 0, 0),
> -	F(384000000, P_GPLL2, 3, 0, 0),
> +	F(200000000, P_GPLL0, 4, 0, 0),
>  	{ }
>  };
>  
> -- 
> 2.25.1
> 

-- 
With best wishes
Dmitry