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Message-ID: <10ada752-f464-4d3d-aeb2-9c63ebff121a@molgen.mpg.de>
Date: Thu, 20 Jun 2024 08:08:23 +0200
From: Paul Menzel <pmenzel@...gen.mpg.de>
To: Potin Lai <potin.lai.pt@...il.com>
Cc: Andrew Jeffery <andrew@...econstruct.com.au>,
Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Joel Stanley <joel@....id.au>,
devicetree@...r.kernel.org, linux-aspeed@...ts.ozlabs.org,
openbmc@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
linux-gpio@...r.kernel.org, Cosmo Chou <cosmo.chou@...ntatw.com>,
Potin Lai <potin.lai@...ntatw.com>, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 1/2] pinctrl: aspeed-g6: Add NCSI pin group config
Dear Potin,
Thank you for your patch.
Am 20.06.24 um 03:25 schrieb Potin Lai:
> In the NCSI pin table, the reference clock output pin (RMIIXRCLKO) is not
> needed on the management controller side.
Please add a reference to the source for this statement.
> To optimize pin usage, add new NCSI pin groupis that excludes RMIIXRCLKO,
groupis? Do you mean group?
> reducing the number of required pins.
>
> Signed-off-by: Potin Lai <potin.lai.pt@...il.com>
> ---
> drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> index 7938741136a2c..31e4e0b342a00 100644
> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
> @@ -249,7 +249,9 @@ PIN_DECL_2(E26, GPIOD3, RGMII3RXD3, RMII3RXER);
>
> FUNC_GROUP_DECL(RGMII3, H24, J22, H22, H23, G22, F22, G23, G24, F23, F26, F25,
> E26);
> -FUNC_GROUP_DECL(RMII3, H24, J22, H22, H23, G23, F23, F26, F25, E26);
> +GROUP_DECL(RMII3, H24, J22, H22, H23, G23, F23, F26, F25, E26);
> +GROUP_DECL(NCSI3, J22, H22, H23, G23, F23, F26, F25, E26);
> +FUNC_DECL_2(RMII3, RMII3, NCSI3);
>
> #define F24 28
> SIG_EXPR_LIST_DECL_SESG(F24, NCTS3, NCTS3, SIG_DESC_SET(SCU410, 28));
> @@ -355,7 +357,9 @@ FUNC_GROUP_DECL(NRTS4, B24);
>
> FUNC_GROUP_DECL(RGMII4, F24, E23, E24, E25, D26, D24, C25, C26, C24, B26, B25,
> B24);
> -FUNC_GROUP_DECL(RMII4, F24, E23, E24, E25, C25, C24, B26, B25, B24);
> +GROUP_DECL(RMII4, F24, E23, E24, E25, C25, C24, B26, B25, B24);
> +GROUP_DECL(NCSI4, E23, E24, E25, C25, C24, B26, B25, B24);
> +FUNC_DECL_2(RMII4, RMII4, NCSI4);
>
> #define D22 40
> SIG_EXPR_LIST_DECL_SESG(D22, SD1CLK, SD1, SIG_DESC_SET(SCU414, 8));
> @@ -1976,6 +1980,8 @@ static const struct aspeed_pin_group aspeed_g6_groups[] = {
> ASPEED_PINCTRL_GROUP(MDIO2),
> ASPEED_PINCTRL_GROUP(MDIO3),
> ASPEED_PINCTRL_GROUP(MDIO4),
> + ASPEED_PINCTRL_GROUP(NCSI3),
> + ASPEED_PINCTRL_GROUP(NCSI4),
> ASPEED_PINCTRL_GROUP(NCTS1),
> ASPEED_PINCTRL_GROUP(NCTS2),
> ASPEED_PINCTRL_GROUP(NCTS3),
Kind regards,
Paul
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