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Message-Id: <20240620065807.151540-7-anshuman.khandual@arm.com> Date: Thu, 20 Jun 2024 12:28:03 +0530 From: Anshuman Khandual <anshuman.khandual@....com> To: linux-arm-kernel@...ts.infradead.org, maz@...nel.org Cc: Anshuman Khandual <anshuman.khandual@....com>, Oliver Upton <oliver.upton@...ux.dev>, James Morse <james.morse@....com>, Suzuki K Poulose <suzuki.poulose@....com>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>, Mark Brown <broonie@...nel.org>, kvmarm@...ts.linux.dev, linux-kernel@...r.kernel.org Subject: [RFC 06/10] arm64/sysreg: Add register fields for MDSELR_EL1 This adds register fields for MDSELR_EL1 as per the definitions based on DDI0601 2024-03. Cc: Catalin Marinas <catalin.marinas@....com> Cc: Will Deacon <will@...nel.org> Cc: Mark Brown <broonie@...nel.org> Cc: linux-arm-kernel@...ts.infradead.org Cc: linux-kernel@...r.kernel.org Reviewed-by: Mark Brown <broonie@...nel.org> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com> --- arch/arm64/tools/sysreg | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 3cd254755cd9..0877fb8b4aff 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -93,6 +93,17 @@ Res0 63:32 Field 31:0 DTRTX EndSysreg +Sysreg MDSELR_EL1 2 0 0 4 2 +Res0 63:6 +Enum 5:4 BANK + 0b00 BANK_0 + 0b01 BANK_1 + 0b10 BANK_2 + 0b11 BANK_3 +EndEnum +Res0 3:0 +EndSysreg + Sysreg OSECCR_EL1 2 0 0 6 2 Res0 63:32 Field 31:0 EDECCR -- 2.25.1
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