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Message-ID: <2295311.iZASKD2KPV@steina-w>
Date: Thu, 20 Jun 2024 13:37:15 +0200
From: Alexander Stein <alexander.stein@...tq-group.com>
To: linux-arm-kernel@...ts.infradead.org, Adam Ford <aford173@...il.com>
Cc: aford@...conembedded.com, Adam Ford <aford173@...il.com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, Pengutronix Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>, Peng Fan <peng.fan@....com>, devicetree@...r.kernel.org, imx@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mp: Fix pgc vpu locations
Hi Adam,
Am Mittwoch, 19. Juni 2024, 12:10:44 CEST schrieb Adam Ford:
> The various pgv_vpu nodes have a mismatch between the value after
> the @ symbol and what is referenced by 'reg' so reorder the nodes
> to align.
>
> Fixes: df680992dd62 ("arm64: dts: imx8mp: add vpu pgc nodes")
> Suggested-by: Alexander Stein <alexander.stein@...tq-group.com>
> Signed-off-by: Adam Ford <aford173@...il.com>
Thanks for the patch.
Reviewd-by: Alexander Stein <alexander.stein@...tq-group.com>
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 3576d2b89b43..ee0c864f27e8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -838,6 +838,12 @@ pgc_gpumix: power-domain@7 {
> assigned-clock-rates = <800000000>, <400000000>;
> };
>
> + pgc_vpumix: power-domain@8 {
> + #power-domain-cells = <0>;
> + reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
> + clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
> + };
> +
> pgc_gpu3d: power-domain@9 {
> #power-domain-cells = <0>;
> reg = <IMX8MP_POWER_DOMAIN_GPU3D>;
> @@ -853,6 +859,28 @@ pgc_mediamix: power-domain@10 {
> <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
> };
>
> + pgc_vpu_g1: power-domain@11 {
> + #power-domain-cells = <0>;
> + power-domains = <&pgc_vpumix>;
> + reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
> + clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
> + };
> +
> + pgc_vpu_g2: power-domain@12 {
> + #power-domain-cells = <0>;
> + power-domains = <&pgc_vpumix>;
> + reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
> + clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
> +
> + };
> +
> + pgc_vpu_vc8000e: power-domain@13 {
> + #power-domain-cells = <0>;
> + power-domains = <&pgc_vpumix>;
> + reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
> + clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> + };
> +
> pgc_hdmimix: power-domain@14 {
> #power-domain-cells = <0>;
> reg = <IMX8MP_POWER_DOMAIN_HDMIMIX>;
> @@ -890,33 +918,6 @@ pgc_ispdwp: power-domain@18 {
> reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP>;
> clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>;
> };
> -
> - pgc_vpumix: power-domain@19 {
> - #power-domain-cells = <0>;
> - reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
> - clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
> - };
> -
> - pgc_vpu_g1: power-domain@20 {
> - #power-domain-cells = <0>;
> - power-domains = <&pgc_vpumix>;
> - reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
> - clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
> - };
> -
> - pgc_vpu_g2: power-domain@21 {
> - #power-domain-cells = <0>;
> - power-domains = <&pgc_vpumix>;
> - reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
> - clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
> - };
> -
> - pgc_vpu_vc8000e: power-domain@22 {
> - #power-domain-cells = <0>;
> - power-domains = <&pgc_vpumix>;
> - reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
> - clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> - };
> };
> };
> };
>
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