linux-kernel - Re: [PATCH v1 2/2] dw_mmc-bluefield: add hw

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Message-ID: <CAPDyKFqXZ3JdQBMpTM1ccAFqUSsqUcZ2fn+Ste2aG-APS2dt2w@mail.gmail.com>
Date: Thu, 20 Jun 2024 16:22:10 +0200
From: Ulf Hansson <ulf.hansson@...aro.org>
To: Liming Sun <limings@...dia.com>
Cc: Adrian Hunter <adrian.hunter@...el.com>, David Thompson <davthompson@...dia.com>, 
	linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 2/2] dw_mmc-bluefield: add hw_reset() support

On Thu, 13 Jun 2024 at 00:53, Liming Sun <limings@...dia.com> wrote:
>
> The eMMC RST_N register is implemented as secure register on
> BlueField SoC and controlled by ATF. This commit sends SMC call
> to ATF for the eMMC HW reset.

Just to make sure I get this correctly. Asserting the eMMC reset line
is managed through a secure register? Or is this about resetting the
eMMC controller?

No matter what, it looks to me that it should be implemented as a
reset provider.

Kind regards
Uffe

>
> Reviewed-by: David Thompson <davthompson@...dia.com>
> Signed-off-by: Liming Sun <limings@...dia.com>
> ---
>  drivers/mmc/host/dw_mmc-bluefield.c | 18 +++++++++++++++++-
>  1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/dw_mmc-bluefield.c b/drivers/mmc/host/dw_mmc-bluefield.c
> index 4747e5698f48..24e0b604b405 100644
> --- a/drivers/mmc/host/dw_mmc-bluefield.c
> +++ b/drivers/mmc/host/dw_mmc-bluefield.c
> @@ -3,6 +3,7 @@
>   * Copyright (C) 2018 Mellanox Technologies.
>   */
>
> +#include <linux/arm-smccc.h>
>  #include <linux/bitfield.h>
>  #include <linux/bitops.h>
>  #include <linux/mmc/host.h>
> @@ -20,6 +21,9 @@
>  #define BLUEFIELD_UHS_REG_EXT_SAMPLE   2
>  #define BLUEFIELD_UHS_REG_EXT_DRIVE    4
>
> +/* SMC call for RST_N */
> +#define BLUEFIELD_SMC_SET_EMMC_RST_N   0x82000007
> +
>  static void dw_mci_bluefield_set_ios(struct dw_mci *host, struct mmc_ios *ios)
>  {
>         u32 reg;
> @@ -34,8 +38,20 @@ static void dw_mci_bluefield_set_ios(struct dw_mci *host, struct mmc_ios *ios)
>         mci_writel(host, UHS_REG_EXT, reg);
>  }
>
> +static void dw_mci_bluefield_hw_reset(struct dw_mci *host)
> +{
> +               struct arm_smccc_res res = { 0 };
> +
> +               arm_smccc_smc(BLUEFIELD_SMC_SET_EMMC_RST_N, 0, 0, 0, 0, 0, 0, 0,
> +                             &res);
> +
> +               if (res.a0)
> +                       pr_err("RST_N failed.\n");
> +}
> +
>  static const struct dw_mci_drv_data bluefield_drv_data = {
> -       .set_ios                = dw_mci_bluefield_set_ios
> +       .set_ios                = dw_mci_bluefield_set_ios,
> +       .hw_reset               = dw_mci_bluefield_hw_reset
>  };
>
>  static const struct of_device_id dw_mci_bluefield_match[] = {
> --
> 2.30.1
>