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Date: Fri, 21 Jun 2024 15:38:47 +0200
From: Borislav Petkov <bp@...en8.de>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
	Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
	"Rafael J. Wysocki" <rafael@...nel.org>,
	Peter Zijlstra <peterz@...radead.org>,
	Adrian Hunter <adrian.hunter@...el.com>,
	Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>,
	Elena Reshetova <elena.reshetova@...el.com>,
	Jun Nakajima <jun.nakajima@...el.com>,
	Rick Edgecombe <rick.p.edgecombe@...el.com>,
	Tom Lendacky <thomas.lendacky@....com>,
	"Kalra, Ashish" <ashish.kalra@....com>,
	Sean Christopherson <seanjc@...gle.com>,
	"Huang, Kai" <kai.huang@...el.com>,
	Ard Biesheuvel <ardb@...nel.org>, Baoquan He <bhe@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	"K. Y. Srinivasan" <kys@...rosoft.com>,
	Haiyang Zhang <haiyangz@...rosoft.com>, kexec@...ts.infradead.org,
	linux-hyperv@...r.kernel.org, linux-acpi@...r.kernel.org,
	linux-coco@...ts.linux.dev, linux-kernel@...r.kernel.org,
	Tao Liu <ltao@...hat.com>
Subject: Re: [PATCHv11 18/19] x86/acpi: Add support for CPU offlining for
 ACPI MADT wakeup method

On Thu, Jun 13, 2024 at 04:41:00PM +0300, Kirill A. Shutemov wrote:
>  Documentation/arch/x86/cpuinfo.rst              |  8 +++-----
>  Documentation/arch/x86/x86_64/5level-paging.rst |  9 ---------
>  arch/x86/Kconfig                                | 24 +-----------------------
>  arch/x86/boot/compressed/pgtable_64.c           | 10 +++-------
>  arch/x86/boot/header.S                          |  4 ----
>  arch/x86/include/asm/disabled-features.h        |  9 +--------
>  arch/x86/include/asm/page_64.h                  |  2 --
>  arch/x86/include/asm/page_64_types.h            |  7 -------
>  arch/x86/include/asm/pgtable_64_types.h         | 18 ------------------
>  arch/x86/kernel/alternative.c                   |  2 +-
>  arch/x86/kernel/head64.c                        |  5 -----
>  arch/x86/kernel/head_64.S                       |  2 --
>  arch/x86/mm/init.c                              |  4 ----
>  arch/x86/mm/pgtable.c                           |  2 --
>  drivers/firmware/efi/libstub/x86-5lvl.c         |  2 +-
>  tools/arch/x86/include/asm/disabled-features.h  |  9 +--------
>  16 files changed, 11 insertions(+), 106 deletions(-)

This causes

ld: vmlinux.o: in function `rip_rel_ptr':
/home/boris/kernel/5th/linux/./arch/x86/include/asm/asm.h:120:(.head.text+0xb96): undefined reference to `page_offset_base'
ld: /home/boris/kernel/5th/linux/./arch/x86/include/asm/asm.h:120:(.head.text+0xbaa): undefined reference to `vmalloc_base'
ld: /home/boris/kernel/5th/linux/./arch/x86/include/asm/asm.h:120:(.head.text+0xbb4): undefined reference to `vmemmap_base'
make[2]: *** [scripts/Makefile.vmlinux:34: vmlinux] Error 1
make[1]: *** [/mnt/kernel/kernel/5th/linux/Makefile:1171: vmlinux] Error 2
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:240: __sub-make] Error 2

with my .config. Attached.

Also:

diff --git a/arch/x86/boot/compressed/pgtable_64.c b/arch/x86/boot/compressed/pgtable_64.c
index f9b77b66c792..25559a788aad 100644
--- a/arch/x86/boot/compressed/pgtable_64.c
+++ b/arch/x86/boot/compressed/pgtable_64.c
@@ -115,12 +115,10 @@ asmlinkage void configure_5level_paging(struct boot_params *bp, void *pgtable)
 	 *   - if the machine supports 5-level paging:
 	 *     + CPUID leaf 7 is supported
 	 *     + the leaf has the feature bit set
-	 *
-	 * That's substitute for boot_cpu_has() in early boot code.
 	 */
 	if (!cmdline_find_option_bool("no5lvl") &&
 	    native_cpuid_eax(0) >= 7 &&
-	    (native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31)))) {
+	    (native_cpuid_ecx(7) & BIT_UL(16))) {
 		l5_required = true;
 
 		/* Initialize variables for 5-level paging */

We can simply check CPUID and be done with it, that early.

Other than that, I like it. Let's do it.

Less ifdeffery, less conditionals. A win-win thing.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

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