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Message-ID: <b270be16-6a4c-40c9-94c6-e9f203a4d8de@kernel.org>
Date: Fri, 21 Jun 2024 17:14:22 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Gokul Sriram Palanisamy <quic_gokulsri@...cinc.com>, sboyd@...nel.org,
andersson@...nel.org, bjorn.andersson@...aro.org, david.brown@...aro.org,
devicetree@...r.kernel.org, jassisinghbrar@...il.com,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-remoteproc@...r.kernel.org,
mark.rutland@....com, mturquette@...libre.com, ohad@...ery.com,
robh@...nel.org, sricharan@...eaurora.org
Cc: gokulsri@...eaurora.org
Subject: Re: [PATCH v9 8/8] arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC
On 21/06/2024 13:46, Gokul Sriram Palanisamy wrote:
> Enable remoteproc WCSS PIL driver with glink. Also,
> configure shared memory and enables smp2p required for IPC.
>
> Signed-off-by: Nikhil Prakash V <quic_nprakash@...cinc.com>
> Signed-off-by: Sricharan R <quic_srichara@...cinc.com>
> Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 80 +++++++++++++++++++++++++++
> 1 file changed, 80 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> index 92682d3c9478..b98766cce0d6 100644
> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -108,6 +108,12 @@ memory@...00000 {
> reg = <0x0 0x4ac00000 0x0 0x400000>;
> no-map;
> };
> +
> + q6_region: memory@...00000 {
> + no-map;
> + reg = <0x0 0x4b000000 0x0 0x5f00000>;
> + };
> +
> };
>
> firmware {
> @@ -117,6 +123,30 @@ scm {
> };
> };
>
> + wcss: smp2p-wcss {
> + compatible = "qcom,smp2p";
> + qcom,smem = <435>, <428>;
> +
> + interrupt-parent = <&intc>;
> + interrupts = <GIC_SPI 322 IRQ_TYPE_EDGE_RISING>;
> +
> + mboxes = <&apcs_glb 9>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <1>;
> +
> + wcss_smp2p_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + wcss_smp2p_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> soc: soc@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -824,6 +854,56 @@ frame@...8000 {
> };
> };
>
> + q6v5_wcss: remoteproc@...0000 {
> + compatible = "qcom,ipq8074-wcss-pil";
> + reg = <0x0cd00000 0x4040>,
> + <0x004ab000 0x20>;
> + reg-names = "qdsp6",
> + "rmb";
> + qca,auto-restart;
> + qca,extended-intc;
> + interrupts-extended = <&intc 0 325 1>,
> + <&wcss_smp2p_in 0 0>,
> + <&wcss_smp2p_in 1 0>,
> + <&wcss_smp2p_in 2 0>,
> + <&wcss_smp2p_in 3 0>;
> + interrupt-names = "wdog",
> + "fatal",
> + "ready",
> + "handover",
> + "stop-ack";
> +
> + resets = <&gcc GCC_WCSSAON_RESET>,
> + <&gcc GCC_WCSS_BCR>,
> + <&gcc GCC_WCSS_Q6_BCR>;
> +
> + reset-names = "wcss_aon_reset",
> + "wcss_reset",
> + "wcss_q6_reset";
> +
> + clocks = <&gcc GCC_PRNG_AHB_CLK>;
> + clock-names = "prng";
That's not what your binding is saying. Convert the binding to DT schema
and then validate this DTS.
Best regards,
Krzysztof
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