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Message-Id: <171895105697.3608188.110944709510140108.b4-ty@linaro.org>
Date: Fri, 21 Jun 2024 09:24:59 +0300
From: Abel Vesa <abel.vesa@...aro.org>
To: abelvesa@...nel.org,
mturquette@...libre.com,
sboyd@...nel.org,
shawnguo@...nel.org,
s.hauer@...gutronix.de,
kernel@...gutronix.de,
festevam@...il.com,
"Peng Fan (OSS)" <peng.fan@....nxp.com>
Cc: imx@...ts.linux.dev,
linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Peng Fan <peng.fan@....com>
Subject: Re: [PATCH V3 00/15] clk: imx: misc update/fix
On Fri, 07 Jun 2024 21:33:32 +0800, Peng Fan (OSS) wrote:
> Changes in v3:
> - Drop two patches
> clk: imx: pll14xx: Add constraint for fvco frequency
> clk: imx: pll14xx: use rate_table for audio plls
> - Update 8ULP PCC check to not return Error
> - Update commit log and Add R-b for
> "clk: imx: imx8mp: fix clock tree update of TF-A managed clocks"
> - Link to v2: https://lore.kernel.org/all/20240510-imx-clk-v2-0-c998f315d29c@nxp.com/
>
> [...]
Applied, thanks!
[01/15] clk: imx: composite-8m: Enable gate clk with mcore_booted
commit: b4c91df8118b5d4efdc9732206de81ac620f53d2
[02/15] clk: imx: composite-93: keep root clock on when mcore enabled
commit: 90d91ce8e20e0df9806ce7f7c49f8ef05471b5ce
[03/15] clk: imx: composite-7ulp: Check the PCC present bit
commit: afd1247ce838b4a06fb0c24e522687475583035d
[04/15] clk: imx: fracn-gppll: fix fractional part of PLL getting lost
commit: af218f2d935e118582d43cbd89c81ef6f26be286
[05/15] clk: imx: imx8mp-audiomix: remove sdma root clock
(no commit info)
[06/15] clk: imx: imx8mp: fix clock tree update of TF-A managed clocks
commit: 6bc3d1e264ad5bace5d1980997abcc7ad5308181
[07/15] clk: imx: Remove CLK_SET_PARENT_GATE for DRAM mux for i.MX7D
commit: 68a3e49a2a5e75a2e1511ff75ca24b584a0f12f4
[08/15] clk: imx: add CLK_SET_RATE_PARENT for lcdif_pixel_src for i.MX7D
commit: e2d956067b0b3c9a9ba5acde655bf6fc708c3ab0
[09/15] clk: imx: imx8mn: add sai7_ipg_clk clock settings
commit: 40cfc8c2fccf5440fb192aa80a84bff9f3288b2c
[10/15] clk: imx: imx8mm: Change the 'nand_usdhc_bus' clock to non-critical one
commit: c7f85fc3dc2facacc1851db992d485a89acde8ee
[11/15] clk: imx: imx8qxp: Add LVDS bypass clocks
commit: ecee2c870be1776c483b3d1a40e3998c7cb7eb1b
[12/15] clk: imx: imx8qxp: Add clock muxes for MIPI and PHY ref clocks
commit: 385e7c90bdb571677c4d16d97e8809427dc4d8d7
[13/15] clk: imx: imx8qxp: Register dc0_bypass0_clk before disp clk
commit: 9cf2310e4845006f72c959d38bd1300863432194
[14/15] clk: imx: imx8qxp: Parent should be initialized earlier than the clock
commit: c69e0dba43e63862ec95cbd91a2daa28e3e87a9e
[15/15] clk: imx: fracn-gppll: update rate table
commit: 747cf5fbfc4326ab2ad9cc73cde8eb7776f3ba53
Best regards,
--
Abel Vesa <abel.vesa@...aro.org>
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