linux-kernel - Re: [PATCH v3 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <5870442.3KgWVfgXFx@bagend>
Date: Fri, 21 Jun 2024 11:36:45 +0200
From: Diederik de Haas <didi.debian@...ow.org>
To: Daniel Golle <daniel@...rotopia.org>,
 Aurelien Jarno <aurelien@...el32.net>, Olivia Mackall <olivia@...enic.com>,
 Herbert Xu <herbert@...dor.apana.org.au>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
 Heiko Stuebner <heiko@...ech.de>, Philipp Zabel <p.zabel@...gutronix.de>,
 Uwe Kleine-König <ukleinek@...ian.org>,
 Sebastian Reichel <sebastian.reichel@...labora.com>,
 Anand Moon <linux.amoon@...il.com>, Dragan Simic <dsimic@...jaro.org>,
 Sascha Hauer <s.hauer@...gutronix.de>, Martin Kaiser <martin@...ser.cx>,
 Ard Biesheuvel <ardb@...nel.org>, linux-crypto@...r.kernel.org,
 devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: Daniel Golle <daniel@...rotopia.org>
Subject:
 Re: [PATCH v3 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x

On Friday, 21 June 2024 03:25:30 CEST Daniel Golle wrote:
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index d8543b5557ee..57c8103500ea
> 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -1855,6 +1855,15 @@ usb2phy1_otg: otg-port {
>                 };
>         };
> 
> +       rng: rng@...88000 {
> +               compatible = "rockchip,rk3568-rng";
> +               reg = <0x0 0xfe388000 0x0 0x4000>;
> +               clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
> +               clock-names = "core", "ahb";
> +               resets = <&cru SRST_TRNG_NS>;
> +               reset-names = "reset";
> +       };
> +
>         pinctrl: pinctrl {
>                 compatible = "rockchip,rk3568-pinctrl";
>                 rockchip,grf = <&grf>;
> --

I had placed the node between ``sdhci: mmc@...10000`` and
``i2s0_8ch: i2s@...00000`` which I think is the proper order.

Cheers,
  Diederik
Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)