lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <26abe6cd-e9da-4db9-9035-76edd5dda614@kernel.org>
Date: Sun, 23 Jun 2024 13:11:48 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Akhil P Oommen <quic_akhilpo@...cinc.com>,
 freedreno <freedreno@...ts.freedesktop.org>,
 dri-devel@...ts.freedesktop.org, linux-arm-msm@...r.kernel.org,
 Rob Clark <robdclark@...il.com>, Bjorn Andersson <andersson@...nel.org>
Cc: Abhinav Kumar <quic_abhinavk@...cinc.com>,
 Conor Dooley <conor+dt@...nel.org>, Daniel Vetter <daniel@...ll.ch>,
 David Airlie <airlied@...il.com>,
 Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
 Konrad Dybcio <konrad.dybcio@...aro.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Marijn Suijten <marijn.suijten@...ainline.org>,
 Maxime Ripard <mripard@...nel.org>, Rob Herring <robh@...nel.org>,
 Sean Paul <sean@...rly.run>, Thomas Zimmermann <tzimmermann@...e.de>,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 0/3] Support for Adreno X1-85 GPU

On 23/06/2024 13:06, Akhil P Oommen wrote:
> This series adds support for the Adreno X1-85 GPU found in Qualcomm's
> compute series chipset, Snapdragon X1 Elite (x1e80100). In this new
> naming scheme for Adreno GPU, 'X' stands for compute series, '1' denotes
> 1st generation and '8' & '5' denotes the tier and the SKU which it
> belongs.
> 
> X1-85 has major focus on doubling core clock frequency and bandwidth
> throughput. It has a dedicated collapsible Graphics MX rail (gmxc) to
> power the memories and double the number of data channels to improve
> bandwidth to DDR.
> 
> Mesa has the necessary bits present already to support this GPU. We are
> able to bring up Gnome desktop by hardcoding "0xffff43050a01" as
> chipid. Also, verified glxgears and glmark2. We have plans to add the
> new chipid support to Mesa in next few weeks, but these patches can go in
> right away to get included in v6.11.
> 
> This series is rebased on top of v6.10-rc4. P3 cherry-picks cleanly on
> qcom/for-next.
> 
> P1 & P2 for Rob, P3 for Bjorn to pick up.

Which Rob?

Why bindings cannot go as usual way - via the subsystem?

Best regards,
Krzysztof


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ