linux-kernel - [tip: irq/urgent] irqchip/loongson-liointc: Set different ISRs for different cores

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Date: Sun, 23 Jun 2024 15:13:10 -0000
From: "tip-bot2 for Huacai Chen" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Tianli Xiong <xiongtianli@...ngson.cn>,
 Huacai Chen <chenhuacai@...ngson.cn>, Thomas Gleixner <tglx@...utronix.de>,
  <stable@...r.kernel.org>, x86@...nel.org, linux-kernel@...r.kernel.org,
 maz@...nel.org
Subject: [tip: irq/urgent] irqchip/loongson-liointc: Set different ISRs for
 different cores

The following commit has been merged into the irq/urgent branch of tip:

Commit-ID:     a9c3ee5d0fdb069b54902300df6ac822027f3b0a
Gitweb:        https://git.kernel.org/tip/a9c3ee5d0fdb069b54902300df6ac822027f3b0a
Author:        Huacai Chen <chenhuacai@...ngson.cn>
AuthorDate:    Sat, 22 Jun 2024 12:33:38 +08:00
Committer:     Thomas Gleixner <tglx@...utronix.de>
CommitterDate: Sun, 23 Jun 2024 17:09:26 +02:00

irqchip/loongson-liointc: Set different ISRs for different cores

The liointc hardware provides separate Interrupt Status Registers (ISR) for
each core. The current code uses always the ISR of core #0, which works
during boot because by default all interrupts are routed to core #0.

When the interrupt routing changes in the firmware configuration then this
causes interrupts to be lost because they are not configured in the
corresponding core.

Use the core index to access the correct ISR instead of a hardcoded 0.

[ tglx: Massaged changelog ]

Fixes: 0858ed035a85 ("irqchip/loongson-liointc: Add ACPI init support")
Co-developed-by: Tianli Xiong <xiongtianli@...ngson.cn>
Signed-off-by: Tianli Xiong <xiongtianli@...ngson.cn>
Signed-off-by: Huacai Chen <chenhuacai@...ngson.cn>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Cc: <stable@...r.kernel.org>
Link: https://lore.kernel.org/r/20240622043338.1566945-1-chenhuacai@loongson.cn

---
 drivers/irqchip/irq-loongson-liointc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-loongson-liointc.c b/drivers/irqchip/irq-loongson-liointc.c
index e4b33ae..7c4fe7a 100644
--- a/drivers/irqchip/irq-loongson-liointc.c
+++ b/drivers/irqchip/irq-loongson-liointc.c
@@ -28,7 +28,7 @@
 
 #define LIOINTC_INTC_CHIP_START	0x20
 
-#define LIOINTC_REG_INTC_STATUS	(LIOINTC_INTC_CHIP_START + 0x20)
+#define LIOINTC_REG_INTC_STATUS(core)	(LIOINTC_INTC_CHIP_START + 0x20 + (core) * 8)
 #define LIOINTC_REG_INTC_EN_STATUS	(LIOINTC_INTC_CHIP_START + 0x04)
 #define LIOINTC_REG_INTC_ENABLE	(LIOINTC_INTC_CHIP_START + 0x08)
 #define LIOINTC_REG_INTC_DISABLE	(LIOINTC_INTC_CHIP_START + 0x0c)
@@ -217,7 +217,7 @@ static int liointc_init(phys_addr_t addr, unsigned long size, int revision,
 		goto out_free_priv;
 
 	for (i = 0; i < LIOINTC_NUM_CORES; i++)
-		priv->core_isr[i] = base + LIOINTC_REG_INTC_STATUS;
+		priv->core_isr[i] = base + LIOINTC_REG_INTC_STATUS(i);
 
 	for (i = 0; i < LIOINTC_NUM_PARENT; i++)
 		priv->handler[i].parent_int_map = parent_int_map[i];