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Message-Id: <20240624153229.68882-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Mon, 24 Jun 2024 16:32:26 +0100
From: Prabhakar <prabhakar.csengg@...il.com>
To: Ulf Hansson <ulf.hansson@...aro.org>,
Wolfram Sang <wsa+renesas@...g-engineering.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>,
linux-mmc@...r.kernel.org
Cc: devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: [PATCH v3 0/3] Add SD/MMC support for Renesas RZ/V2H(P) SoC
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Hi All,
This patch series aims to add SD/MMC support for Renesas RZ/V2H(P) SoC.
Below is the sample usage of using internal regulator:
SoC DTSI node:
sdhi1: mmc@...10000 {
compatible = "renesas,sdhi-r9a09g057";
reg = <0x0 0x15c10000 0 0x10000>;
interrupts = <GIC_SPI 737 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 167>,
<&cpg CPG_MOD 169>,
<&cpg CPG_MOD 168>,
<&cpg CPG_MOD 170>;
clock-names = "core", "clkh", "cd", "aclk";
resets = <&cpg 168>;
power-domains = <&cpg>;
status = "disabled";
vqmmc_sdhi1: vqmmc-regulator {
regulator-compatible = "vqmmc-r9a09g057-regulator";
regulator-name = "sdhi1-vqmmc-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
status = "disabled";
};
};
* Example of SDHI1 while using internal regulator:
** Board DTS:
&sdhi1 {
pinctrl-0 = <&sdhi1_pins>;
pinctrl-1 = <&sdhi1_pins>;
pinctrl-names = "default", "state_uhs";
renesas,sdhi-use-internal-regulator;
vmmc-supply = <®_3p3v>;
vqmmc-supply = <&vqmmc_sdhi1>;
bus-width = <4>;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&vqmmc_sdhi1 {
status = "okay";
};
* Example of SDHI1 while using GPIO regulator while internal regulator is present:
** Board DTS:
vccq_sdhi1: regulator-vccq-sdhi1 {
compatible = "regulator-gpio";
regulator-name = "SDHI1 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&pinctrl RZG2L_GPIO(10, 2) GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <3300000 0>, <1800000 1>;
};
&sdhi1 {
pinctrl-0 = <&sdhi1_pins>;
pinctrl-1 = <&sdhi1_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <®_3p3v>;
vqmmc-supply = <&vccq_sdhi1>;
bus-width = <4>;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
v2->v3
- Renamed vqmmc-r9a09g057-regulator object to vqmmc-regulator
- Added regulator-compatible property for vqmmc-regulator
- Added 'renesas,sdhi-use-internal-regulator' DT property
- Included RB tags for patch 2/3
- Moved regulator info to renesas_sdhi_of_data instead of quirks
- Added support to configure the init state of regulator
- Added function pointers to configure regulator
- Added REGULATOR_CHANGE_VOLTAGE mask
v1->v2
- Dropped regulator core API changes
- Updated DT binding
- Now controlling PWEN bit via regultor api
v1: https://patchwork.kernel.org/project/linux-renesas-soc/cover/20240605074936.578687-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
Cheers,
Prabhakar
Lad Prabhakar (3):
dt-bindings: mmc: renesas,sdhi: Document RZ/V2H(P) support
mmc: tmio: Use MMC core APIs to control the vqmmc regulator
mmc: renesas_sdhi: Add support for RZ/V2H(P) SoC
.../devicetree/bindings/mmc/renesas,sdhi.yaml | 30 +++-
drivers/mmc/host/renesas_sdhi.h | 13 ++
drivers/mmc/host/renesas_sdhi_core.c | 93 +++++++++++
drivers/mmc/host/renesas_sdhi_internal_dmac.c | 150 ++++++++++++++++++
drivers/mmc/host/tmio_mmc.h | 5 +
drivers/mmc/host/tmio_mmc_core.c | 7 +-
6 files changed, 293 insertions(+), 5 deletions(-)
--
2.34.1
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