linux-kernel - Re: [PATCH v1 1/2] perf arm-spe: Support multiple Arm SPE PMUs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAP-5=fWgGR-L6V5RNNpTHdHyT0wTOqKd3CQ8xQSQDAJ1D2edYA@mail.gmail.com>
Date: Mon, 24 Jun 2024 09:16:43 -0700
From: Ian Rogers <irogers@...gle.com>
To: Leo Yan <leo.yan@....com>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>, James Clark <james.clark@....com>, 
	Suzuki K Poulose <suzuki.poulose@....com>, Mike Leach <mike.leach@...aro.org>, 
	John Garry <john.g.garry@...cle.com>, Will Deacon <will@...nel.org>, 
	Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>, 
	Namhyung Kim <namhyung@...nel.org>, Mark Rutland <mark.rutland@....com>, 
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>, 
	Adrian Hunter <adrian.hunter@...el.com>, "Liang, Kan" <kan.liang@...ux.intel.com>, 
	Kajol Jain <kjain@...ux.ibm.com>, coresight@...ts.linaro.org, 
	linux-arm-kernel@...ts.infradead.org, linux-perf-users@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 1/2] perf arm-spe: Support multiple Arm SPE PMUs

On Sun, Jun 23, 2024 at 6:34 AM Leo Yan <leo.yan@....com> wrote:
>
> A platform can have more than one Arm SPE PMU. For example, a system
> with multiple clusters may have each cluster enabled with its own Arm
> SPE instance. In such case, the PMU devices will be named 'arm_spe_0',
> 'arm_spe_1', and so on.
>
> Currently, the tool only supports 'arm_spe_0'. This commit extends
> support to multiple Arm SPE PMUs by detecting the substring 'arm_spe'.
>
> Signed-off-by: Leo Yan <leo.yan@....com>
> ---
>  tools/perf/arch/arm/util/pmu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c
> index 8b7cb68ba1a8..29cfa1e427ed 100644
> --- a/tools/perf/arch/arm/util/pmu.c
> +++ b/tools/perf/arch/arm/util/pmu.c
> @@ -27,7 +27,7 @@ void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_unused)
>                 pmu->selectable = true;
>                 pmu->is_uncore = false;
>                 pmu->perf_event_attr_init_default = arm_spe_pmu_default_config;
> -               if (!strcmp(pmu->name, "arm_spe_0"))
> +               if (strstr(pmu->name, "arm_spe"))

Why not use strstarts?

Thanks,
Ian


>                         pmu->mem_events = perf_mem_events_arm;
>         } else if (strstarts(pmu->name, HISI_PTT_PMU_NAME)) {
>                 pmu->selectable = true;
> --
> 2.34.1
>