linux-kernel - Re: [PATCH v4 5/6] i2c: smbus: Support DDR5 SPD EEPROMs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <b361066a-d36c-42c6-9e54-5cde8c40c6b7@roeck-us.net>
Date: Mon, 24 Jun 2024 13:30:33 -0700
From: Guenter Roeck <linux@...ck-us.net>
To: Heiner Kallweit <hkallweit1@...il.com>,
 Wolfram Sang <wsa+renesas@...g-engineering.com>, Armin Wolf
 <W_Armin@....de>, linux-hwmon@...r.kernel.org, linux-i2c@...r.kernel.org,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, René Rebe
 <rene@...ctcode.de>, Thomas Weißschuh
 <linux@...ssschuh.net>, Stephen Horvath <s.horvath@...look.com.au>
Subject: Re: [PATCH v4 5/6] i2c: smbus: Support DDR5 SPD EEPROMs

On 6/24/24 13:06, Heiner Kallweit wrote:
[ ... ]
> It seems Intel systems never have more than one i801 SMBUS adapter,
> therefore systems with more than 8 memory slots have to use muxing.
> The current code was developed for the Intel use case, and therefore
> doesn't consider that a system may have dedicated SMBUS controllers
> per 8 memory slots. So support for this scenario has to be added.
> 

I absolutely agree, hopefully by someone with such a system.

Thanks,
Guenter