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Message-Id: <20240624-x1e-swr-reset-v1-2-da326d0733d4@linaro.org>
Date: Mon, 24 Jun 2024 11:55:31 +0100
From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Subject: [PATCH 2/3] dt-bindings: clock: Add x1e80100 LPASSCC reset
controller
X1E80100 LPASS (Low Power Audio Subsystem) clock controller provides reset
support when it is under the control of Q6DSP.
Add x1e80100 compatible to the existing sc8280xp as these reset
controllers have same reg layout and compatible.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
---
Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
index 1565252be672..a576cb895bed 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
@@ -22,6 +22,7 @@ properties:
- qcom,sc8280xp-lpassaudiocc
- qcom,sc8280xp-lpasscc
- qcom,x1e80100-lpassaudiocc
+ - qcom,x1e80100-lpasscc
reg:
maxItems: 1
--
2.25.1
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