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Message-ID: <3bb6bf45-2a3e-4ed8-86f3-f0480af622d5@kernel.org>
Date: Mon, 24 Jun 2024 16:38:07 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Konrad Dybcio <konrad.dybcio@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] dt-bindings: clock: Add x1e80100 LPASS AUDIOCC
reset controller
On 24/06/2024 15:32, Srinivas Kandagatla wrote:
> X1E80100 LPASS (Low Power Audio Subsystem) Audio clock controller
> provides reset support when it is under the control of Q6DSP.
>
> Add x1e80100 compatible to the existing sc8280xp as these reset
> controllers have same reg layout and compatible.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> ---
> .../devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
> index 3326dcd6766c..c33bf4c5af7d 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
> @@ -18,10 +18,13 @@ description: |
>
> properties:
> compatible:
> - enum:
> - - qcom,sc8280xp-lpassaudiocc
> - - qcom,sc8280xp-lpasscc
> -
> + oneOf:
> + - enum:
> + - qcom,sc8280xp-lpassaudiocc
> + - qcom,sc8280xp-lpasscc
> + - items:
> + - const: qcom,x1e80100-lpassaudiocc
> + - const: qcom,sc8280xp-lpassaudiocc
Please keep here blank line. With this:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> reg:
> maxItems: 1
>
>
Best regards,
Krzysztof
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