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Message-ID: <a26650a6-02d7-3626-ac19-a0fe359f631e@quicinc.com>
Date: Tue, 25 Jun 2024 13:39:11 -0700
From: Abhinav Kumar <quic_abhinavk@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Rob Clark
<robdclark@...il.com>, Sean Paul <sean@...rly.run>,
Marijn Suijten
<marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Daniel
Vetter <daniel@...ll.ch>
CC: Bjorn Andersson <andersson@...nel.org>, <linux-arm-msm@...r.kernel.org>,
<dri-devel@...ts.freedesktop.org>, <freedreno@...ts.freedesktop.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH RFC v3] drm/msm/dpu: Configure DP INTF/PHY selector
On 6/25/2024 1:24 PM, Dmitry Baryshkov wrote:
> From: Bjorn Andersson <andersson@...nel.org>
>
> Some platforms provides a mechanism for configuring the mapping between
> (one or two) DisplayPort intfs and their PHYs.
>
> In particular SC8180X requires this to be configured, since on this
> platform there are fewer controllers than PHYs.
>
> The change implements the logic for optionally configuring which PHY
> each of the DP INTFs should be connected to and marks the SC8180X DPU to
> program 2 entries.
>
> For now the request is simply to program the mapping 1:1, any support
> for alternative mappings is left until the use case arrise.
>
> Note that e.g. msm-4.14 unconditionally maps INTF 0 to PHY 0 on all
> platforms, so perhaps this is needed in order to get DisplayPort working
> on some other platforms as well.
>
> Signed-off-by: Bjorn Andersson <andersson@...nel.org>
> Co-developed-by: Bjorn Andersson <andersson@...nel.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
> Changes in v3:
> - Expanded the commit message and in-code comment based on feedback from
> Abhinav
> - Fixed field masks for the affected register (Abhinav)
> - Link to v2: https://lore.kernel.org/r/20240613-dp-phy-sel-v2-1-99af348c9bae@linaro.org
>
> Changes in v2:
> - Removed entry from the catalog.
> - Reworked the interface of dpu_hw_dp_phy_intf_sel(). Pass two entries
> for the PHYs instead of three entries.
> - It seems the register isn't present on sdm845, enabled the callback
> only for DPU >= 5.x
> - Added a comment regarding the data being platform-specific.
> - Link to v1: https://lore.kernel.org/r/20230612221047.1886709-1-quic_bjorande@quicinc.com
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 39 +++++++++++++++++++++++++++---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 18 ++++++++++++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hwio.h | 7 ++++++
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 12 ++++++++-
> 4 files changed, 70 insertions(+), 6 deletions(-)
>
LGTM.
Reviewed-by: Abhinav Kumar <quic_abhinavk@...cinc.com>
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