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Date: Tue, 25 Jun 2024 14:09:14 -0700 From: Samuel Holland <samuel.holland@...ive.com> To: Palmer Dabbelt <palmer@...belt.com>, linux-riscv@...ts.infradead.org Cc: devicetree@...r.kernel.org, Catalin Marinas <catalin.marinas@....com>, linux-kernel@...r.kernel.org, Anup Patel <anup@...infault.org>, Conor Dooley <conor@...nel.org>, kasan-dev@...glegroups.com, Atish Patra <atishp@...shpatra.org>, Evgenii Stepanov <eugenis@...gle.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Rob Herring <robh+dt@...nel.org>, "Kirill A . Shutemov" <kirill.shutemov@...ux.intel.com>, Samuel Holland <samuel.holland@...ive.com> Subject: [PATCH v2 03/10] riscv: Add CSR definitions for pointer masking Pointer masking is controlled via a two-bit PMM field, which appears in various CSRs depending on which extensions are implemented. Smmpm adds the field to mseccfg; Smnpm adds the field to menvcfg; Ssnpm adds the field to senvcfg. If the H extension is implemented, Ssnpm also defines henvcfg.PMM and hstatus.HUPMM. Signed-off-by: Samuel Holland <samuel.holland@...ive.com> --- Changes in v2: - Use the correct name for the hstatus.HUPMM field arch/riscv/include/asm/csr.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 25966995da04..5c0c0d574f63 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -119,6 +119,10 @@ /* HSTATUS flags */ #ifdef CONFIG_64BIT +#define HSTATUS_HUPMM _AC(0x3000000000000, UL) +#define HSTATUS_HUPMM_PMLEN_0 _AC(0x0000000000000, UL) +#define HSTATUS_HUPMM_PMLEN_7 _AC(0x2000000000000, UL) +#define HSTATUS_HUPMM_PMLEN_16 _AC(0x3000000000000, UL) #define HSTATUS_VSXL _AC(0x300000000, UL) #define HSTATUS_VSXL_SHIFT 32 #endif @@ -195,6 +199,10 @@ /* xENVCFG flags */ #define ENVCFG_STCE (_AC(1, ULL) << 63) #define ENVCFG_PBMTE (_AC(1, ULL) << 62) +#define ENVCFG_PMM _AC(0x300000000, ULL) +#define ENVCFG_PMM_PMLEN_0 _AC(0x000000000, ULL) +#define ENVCFG_PMM_PMLEN_7 _AC(0x200000000, ULL) +#define ENVCFG_PMM_PMLEN_16 _AC(0x300000000, ULL) #define ENVCFG_CBZE (_AC(1, UL) << 7) #define ENVCFG_CBCFE (_AC(1, UL) << 6) #define ENVCFG_CBIE_SHIFT 4 @@ -216,6 +224,12 @@ #define SMSTATEEN0_SSTATEEN0_SHIFT 63 #define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT) +/* mseccfg bits */ +#define MSECCFG_PMM ENVCFG_PMM +#define MSECCFG_PMM_PMLEN_0 ENVCFG_PMM_PMLEN_0 +#define MSECCFG_PMM_PMLEN_7 ENVCFG_PMM_PMLEN_7 +#define MSECCFG_PMM_PMLEN_16 ENVCFG_PMM_PMLEN_16 + /* symbolic CSR names: */ #define CSR_CYCLE 0xc00 #define CSR_TIME 0xc01 @@ -382,6 +396,8 @@ #define CSR_MIP 0x344 #define CSR_PMPCFG0 0x3a0 #define CSR_PMPADDR0 0x3b0 +#define CSR_MSECCFG 0x747 +#define CSR_MSECCFGH 0x757 #define CSR_MVENDORID 0xf11 #define CSR_MARCHID 0xf12 #define CSR_MIMPID 0xf13 -- 2.44.1
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