linux-kernel - Re: [PATCH V4 5/7] clk: qcom: Add NSS clock Controller driver for IPQ9574

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Wed, 26 Jun 2024 20:09:15 +0530
From: Devi Priya <quic_devipriy@...cinc.com>
To: Andrew Lunn <andrew@...n.ch>
CC: <andersson@...nel.org>, <mturquette@...libre.com>, <sboyd@...nel.org>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <konrad.dybcio@...aro.org>, <catalin.marinas@....com>,
        <will@...nel.org>, <p.zabel@...gutronix.de>,
        <richardcochran@...il.com>, <geert+renesas@...der.be>,
        <dmitry.baryshkov@...aro.org>, <neil.armstrong@...aro.org>,
        <arnd@...db.de>, <m.szyprowski@...sung.com>, <nfraprado@...labora.com>,
        <u-kumar1@...com>, <linux-arm-msm@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
        <netdev@...r.kernel.org>
Subject: Re: [PATCH V4 5/7] clk: qcom: Add NSS clock Controller driver for
 IPQ9574



On 6/25/2024 8:09 PM, Andrew Lunn wrote:
>> +static struct clk_alpha_pll ubi32_pll_main = {
>> +	.offset = 0x28000,
>> +	.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_NSS_HUAYRA],
>> +	.flags = SUPPORTS_DYNAMIC_UPDATE,
>> +	.clkr = {
>> +		.hw.init = &(const struct clk_init_data) {
>> +			.name = "ubi32_pll_main",
>> +			.parent_data = &(const struct clk_parent_data) {
>> +				.index = DT_XO,
>> +			},
>> +			.num_parents = 1,
>> +			.ops = &clk_alpha_pll_huayra_ops,
>> +		},
>> +	},
>> +};
>> +
>> +static struct clk_alpha_pll_postdiv ubi32_pll = {
>> +	.offset = 0x28000,
>> +	.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_NSS_HUAYRA],
>> +	.width = 2,
>> +	.clkr.hw.init = &(const struct clk_init_data) {
>> +		.name = "ubi32_pll",
>> +		.parent_hws = (const struct clk_hw *[]) {
>> +			&ubi32_pll_main.clkr.hw
>> +		},
>> +		.num_parents = 1,
>> +		.ops = &clk_alpha_pll_postdiv_ro_ops,
>> +		.flags = CLK_SET_RATE_PARENT,
>> +	},
>> +};
> 
> Can these structures be made const? You have quite a few different
> structures in this driver, some of which are const, and some which are
> not.
> 
Sure, will check and update this in V6

Thanks,
Devi Priya
> 	Andrew
>