linux-kernel - Re: [PATCH 1/2] Coresight: Set correct cs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Wed, 26 Jun 2024 11:30:29 +0800
From: JieGan <quic_jiegan@...cinc.com>
To: Mathieu Poirier <mathieu.poirier@...aro.org>,
        Suzuki K Poulose
	<suzuki.poulose@....com>,
        Alexander Shishkin
	<alexander.shishkin@...ux.intel.com>,
        Konrad Dybcio <konradybcio@...il.com>,
        Mike Leach <mike.leach@...aro.org>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC: Jinlong Mao <quic_jinlmao@...cinc.com>,
        Greg Kroah-Hartman
	<gregkh@...uxfoundation.org>,
        <coresight@...ts.linaro.org>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        Tingwei Zhang <quic_tingweiz@...cinc.com>,
        Yuanfang Zhang <quic_yuanfang@...cinc.com>,
        Tao Zhang
	<quic_taozha@...cinc.com>,
        Trilok Soni <quic_tsoni@...cinc.com>,
        Song Chai
	<quic_songchai@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <andersson@...nel.org>,
        <quic_yijiyang@...cinc.com>, <quic_yuanjiey@...cinc.com>,
        <quic_liuxin@...cinc.com>, <quic_yanzl@...cinc.com>,
        <quic_xinlon@...cinc.com>, <quic_xueqnie@...cinc.com>,
        <quic_sijiwu@...cinc.com>
Subject: Re: [PATCH 1/2] Coresight: Set correct cs_mode for TPDM to fix
 disable issue

On Wed, Jun 26, 2024 at 10:25:36AM +0800, Jie Gan wrote:
> The coresight_disable_source_sysfs function should verify the
> mode of the coresight device before disabling the source.
> 
> However, the mode for the TPDM device is always set to
> CS_MODE_DISABLED, resulting in the check consistently failing.
> As a result, TPDM cannot be properly disabled.
> 
> Configure CS_MODE_SYSFS/CS_MODE_PERF during the enablement.
> Configure CS_MODE_DISABLED during the disablement.
> 
> Fixes: b3c71626a933 ("Coresight: Add coresight TPDM source driver")
> Signed-off-by: Jie Gan <quic_jiegan@...cinc.com>
> ---
>  drivers/hwtracing/coresight/coresight-tpdm.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
> index a9708ab0d488..90a5105f6199 100644
> --- a/drivers/hwtracing/coresight/coresight-tpdm.c
> +++ b/drivers/hwtracing/coresight/coresight-tpdm.c
> @@ -449,6 +449,11 @@ static int tpdm_enable(struct coresight_device *csdev, struct perf_event *event,
>  		return -EBUSY;
>  	}
>  
> +	if (!coresight_take_mode(csdev, mode)) {
> +		spin_unlock(&drvdata->spinlock);
> +		return -EBUSY;
> +	}
> +
>  	__tpdm_enable(drvdata);
>  	drvdata->enable = true;
>  	spin_unlock(&drvdata->spinlock);
> @@ -506,6 +511,7 @@ static void tpdm_disable(struct coresight_device *csdev,
>  	}
>  
>  	__tpdm_disable(drvdata);
> +	coresight_set_mode(csdev, CS_MODE_DISABLED);
>  	drvdata->enable = false;
>  	spin_unlock(&drvdata->spinlock);
>  
> -- 
> 2.34.1
>
Please ignore this patch. This patch should be included by an independent email.
I will correct it and send it later.

Thanks
Jie
>