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Message-ID: <CAHBxVyHx9hTRPosizV_yn6DUZi-MTNTrAbJdkV3049D-qsDHcw@mail.gmail.com>
Date: Wed, 26 Jun 2024 09:18:46 -0700
From: Atish Kumar Patra <atishp@...osinc.com>
To: Samuel Holland <samuel.holland@...ive.com>
Cc: linux-riscv@...ts.infradead.org, kvm-riscv@...ts.infradead.org,
Atish Patra <atishp@...shpatra.org>, Anup Patel <anup@...infault.org>,
Will Deacon <will@...nel.org>, Mark Rutland <mark.rutland@....com>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>,
Andrew Jones <ajones@...tanamicro.com>, Conor Dooley <conor.dooley@...rochip.com>,
Palmer Dabbelt <palmer@...osinc.com>, Alexandre Ghiti <alexghiti@...osinc.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org
Subject: Re: [PATCH v3 2/3] drivers/perf: riscv: Reset the counter to hpmevent
mapping while starting cpus
On Wed, Jun 26, 2024 at 6:24 AM Samuel Holland
<samuel.holland@...ive.com> wrote:
>
> On 2024-06-26 2:23 AM, Atish Patra wrote:
> > From: Samuel Holland <samuel.holland@...ive.com>
> >
> > Currently, we stop all the counters while a new cpu is brought online.
> > However, the hpmevent to counter mappings are not reset. The firmware may
> > have some stale encoding in their mapping structure which may lead to
> > undesirable results. We have not encountered such scenario though.
> >
>
> This needs:
>
> Signed-off-by: Samuel Holland <samuel.holland@...ive.com>
>
Oops. Sorry I missed that.
@Alexandre Ghiti @Palmer Dabbelt : Can you add that while picking up
the patch or should I respin a v4 ?
> otherwise your commit message looks fine to me.
>
> > Signed-off-by: Atish Patra <atishp@...osinc.com>
> > ---
> > drivers/perf/riscv_pmu_sbi.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> > index a2e4005e1fd0..94bc369a3454 100644
> > --- a/drivers/perf/riscv_pmu_sbi.c
> > +++ b/drivers/perf/riscv_pmu_sbi.c
> > @@ -762,7 +762,7 @@ static inline void pmu_sbi_stop_all(struct riscv_pmu *pmu)
> > * which may include counters that are not enabled yet.
> > */
> > sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP,
> > - 0, pmu->cmask, 0, 0, 0, 0);
> > + 0, pmu->cmask, SBI_PMU_STOP_FLAG_RESET, 0, 0, 0);
> > }
> >
> > static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu)
> >
>
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