linux-kernel - Re: [PATCH v3 2/3] drivers/perf: riscv: Reset the counter to hpmevent mapping while starting cpus

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Date: Wed, 26 Jun 2024 13:40:52 -0700
From: Atish Kumar Patra <atishp@...osinc.com>
To: Conor Dooley <conor@...nel.org>
Cc: Samuel Holland <samuel.holland@...ive.com>, linux-riscv@...ts.infradead.org, 
	kvm-riscv@...ts.infradead.org, Atish Patra <atishp@...shpatra.org>, 
	Anup Patel <anup@...infault.org>, Will Deacon <will@...nel.org>, 
	Mark Rutland <mark.rutland@....com>, Paul Walmsley <paul.walmsley@...ive.com>, 
	Palmer Dabbelt <palmer@...belt.com>, Andrew Jones <ajones@...tanamicro.com>, 
	Conor Dooley <conor.dooley@...rochip.com>, Palmer Dabbelt <palmer@...osinc.com>, 
	Alexandre Ghiti <alexghiti@...osinc.com>, linux-arm-kernel@...ts.infradead.org, 
	linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Subject: Re: [PATCH v3 2/3] drivers/perf: riscv: Reset the counter to hpmevent
 mapping while starting cpus

On Wed, Jun 26, 2024 at 9:39 AM Conor Dooley <conor@...nel.org> wrote:
>
> On Wed, Jun 26, 2024 at 05:37:07PM +0100, Conor Dooley wrote:
> > On Wed, Jun 26, 2024 at 09:18:46AM -0700, Atish Kumar Patra wrote:
> > > On Wed, Jun 26, 2024 at 6:24 AM Samuel Holland
> > > <samuel.holland@...ive.com> wrote:
> > > >
> > > > On 2024-06-26 2:23 AM, Atish Patra wrote:
> > > > > From: Samuel Holland <samuel.holland@...ive.com>
> > > > >
> > > > > Currently, we stop all the counters while a new cpu is brought online.
> > > > > However, the hpmevent to counter mappings are not reset. The firmware may
> > > > > have some stale encoding in their mapping structure which may lead to
> > > > > undesirable results. We have not encountered such scenario though.
> > > > >
> > > >
> > > > This needs:
> > > >
> > > > Signed-off-by: Samuel Holland <samuel.holland@...ive.com>
> > > >
> > >
> > > Oops. Sorry I missed that.
> > >
> > > @Alexandre Ghiti
> >
> > What's Alex going to be able to do?
> >

He is collecting the fixes patches in the RISC-V tree and pinged for
revision for this patch last week.

> > > @Palmer Dabbelt : Can you add that while picking up
> > > the patch or should I respin a v4 ?
> >
> > b4 should pick the signoff up though. "perf: RISC-V: Check standard
> > event availability" seems to be missing your signoff though...
>
> Huh, this doesn't really make sense. I meant:
>         b4 should pick the signoff up, though "perf: RISC-V: Check standard
>         event availability" seems to be missing your signoff...

Strange. I modified and sent the patch using b4 as well. It's missing
my sign off too.