linux-kernel - Re: [PATCH v1 2/3] drm/msm/adreno: Add support for X185 GPU

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Message-ID: <c1ec95ac-3831-4d78-a572-c95c0ee493a2@linaro.org>
Date: Thu, 27 Jun 2024 00:40:49 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Rob Clark <robdclark@...il.com>
Cc: Akhil P Oommen <quic_akhilpo@...cinc.com>,
 freedreno <freedreno@...ts.freedesktop.org>,
 dri-devel@...ts.freedesktop.org, linux-arm-msm@...r.kernel.org,
 Bjorn Andersson <andersson@...nel.org>,
 Abhinav Kumar <quic_abhinavk@...cinc.com>, Daniel Vetter <daniel@...ll.ch>,
 David Airlie <airlied@...il.com>,
 Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
 Marijn Suijten <marijn.suijten@...ainline.org>, Sean Paul <sean@...rly.run>,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 2/3] drm/msm/adreno: Add support for X185 GPU

On 27.06.2024 12:32 AM, Rob Clark wrote:
> On Wed, Jun 26, 2024 at 2:38 PM Konrad Dybcio <konrad.dybcio@...aro.org> wrote:
>>
>> On 26.06.2024 8:43 PM, Rob Clark wrote:
>>> On Wed, Jun 26, 2024 at 1:24 AM Akhil P Oommen <quic_akhilpo@...cinc.com> wrote:
>>>>
>>>> On Mon, Jun 24, 2024 at 03:53:48PM +0200, Konrad Dybcio wrote:
>>>>>
>>>>>
>>>>> On 6/23/24 13:06, Akhil P Oommen wrote:
>>>>>> Add support in drm/msm driver for the Adreno X185 gpu found in
>>>>>> Snapdragon X1 Elite chipset.
>>>>>>
>>>>>> Signed-off-by: Akhil P Oommen <quic_akhilpo@...cinc.com>
>>>>>> ---
>>>>>>
>>>>>>   drivers/gpu/drm/msm/adreno/a6xx_gmu.c      | 19 +++++++++++++++----
>>>>>>   drivers/gpu/drm/msm/adreno/a6xx_gpu.c      |  6 ++----
>>>>>>   drivers/gpu/drm/msm/adreno/adreno_device.c | 14 ++++++++++++++
>>>>>>   drivers/gpu/drm/msm/adreno/adreno_gpu.h    |  5 +++++
>>>>>>   4 files changed, 36 insertions(+), 8 deletions(-)
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>>>>>> index 0e3dfd4c2bc8..168a4bddfaf2 100644
>>>>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>>>>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>>>>>> @@ -830,8 +830,10 @@ static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state)
>>>>>>      */
>>>>>>     gmu_write(gmu, REG_A6XX_GMU_CM3_CFG, 0x4052);
>>>>>> +   if (adreno_is_x185(adreno_gpu)) {
>>>>>> +           chipid = 0x7050001;
>>>>>
>>>>> What's wrong with using the logic below?
>>>>
>>>> patchid is BITS(7, 0), not (15, 8) in the case of x185. Due to the
>>>> changes in the chipid scheme within the a7x family, this is a bit
>>>> confusing. I will try to improve here in another series.
>>>
>>> I'm thinking we should just add gmu_chipid to struct a6xx_info, tbh
>>>
>>> Maybe to start with, we can fall back to the existing logic if
>>> a6xx_info::gmu_chipid is zero so we don't have to add it for _every_
>>> a6xx/a7xx
>>
>> If X185 is not the only occurence, I'd second this..
> 
> basically all a7xx are "special" compared to the original logic, so we
> can start with using gmu_chipid for just a7xx

That works

Konrad