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Message-ID: <8734p02s4t.fsf@BLR-5CG11610CF.amd.com>
Date: Wed, 26 Jun 2024 10:54:34 +0530
From: Gautham R.Shenoy <gautham.shenoy@....com>
To: Dhananjay Ugwekar <Dhananjay.Ugwekar@....com>, <rafael@...nel.org>,
<viresh.kumar@...aro.org>, <mario.limonciello@....com>, <perry.yuan@....com>,
<skhan@...uxfoundation.org>, <li.meng@....com>, <ray.huang@....com>
CC: <linux-pm@...r.kernel.org>, <linux-kernel@...r.kernel.org>, "Dhananjay
Ugwekar" <Dhananjay.Ugwekar@....com>, <darcari@...hat.com>
Subject: Re: [PATCH 2/2] cpufreq/amd-pstate: Fix the scaling_min/max_freq
setting on shared memory CPPC systems
Dhananjay Ugwekar <Dhananjay.Ugwekar@....com> writes:
> On shared memory CPPC systems, with amd_pstate=active mode, the change
> in scaling_min/max_freq doesn't get written to the shared memory
> region. Due to this, the writes to the scaling_min/max_freq sysfs file
> don't take effect. Fix this by propagating the scaling_min/max_freq
> changes to the shared memory region.
>
> Fixes: ffa5096a7c33 ("cpufreq: amd-pstate: implement Pstate EPP support for the AMD processors")
> Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@....com>
Please add the following in your v2:
Reported-by: David Arcari <darcari@...hat.com>
> ---
> drivers/cpufreq/amd-pstate.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index 9ad62dbe8bfb..7c1c96abe5bd 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -264,6 +264,15 @@ static int amd_pstate_set_epp(struct amd_cpudata *cpudata, u32 epp)
> cpudata->epp_cached = epp;
> } else {
> perf_ctrls.energy_perf = epp;
> + perf_ctrls.max_perf = cpudata->max_limit_perf;
> + perf_ctrls.min_perf = cpudata->min_limit_perf;
> + perf_ctrls.desired_perf = 0U;
> +
> + ret = cppc_set_perf(cpudata->cpu, &perf_ctrls);
> + if (ret) {
> + pr_debug("failed to set min max limits (%d)\n", ret);
> + return ret;
> + }
> ret = cppc_set_epp_perf(cpudata->cpu, &perf_ctrls, 1);
> if (ret) {
> pr_debug("failed to set energy perf value (%d)\n", ret);
> @@ -1547,6 +1556,7 @@ static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
> }
>
> WRITE_ONCE(cpudata->cppc_req_cached, value);
> +
> amd_pstate_set_epp(cpudata, epp);
> }
>
> --
--
Thanks and Regards
gautham.
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