lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <a424caf3072d12ef6ba0c56c411789fb3282e844.1719408040.git.zhouquan@iscas.ac.cn>
Date: Thu, 27 Jun 2024 11:02:46 +0800
From: zhouquan@...as.ac.cn
To: linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-kselftest@...r.kernel.org
Cc: oleg@...hat.com,
	paul.walmsley@...ive.com,
	palmer@...belt.com,
	aou@...s.berkeley.edu,
	andy.chiu@...ive.com,
	shuah@...nel.org,
	charlie@...osinc.com,
	zhouquan@...as.ac.cn
Subject: [PATCH v1 1/2] riscv: Expose orig_a0 in the user_regs_struct structure

From: Quan Zhou <zhouquan@...as.ac.cn>

Expose orig_a0 to userspace to ensure that users can modify
the actual value of `a0` in the traced process through the
ptrace(PTRACE_SETREGSET, ...) path.

The addition of orig_a0 also requires the following adjustments:
1) Adjust the position of orig_a0 in pt_regs to ensure correct copying.
2) MAX_REG_OFFSET should match the new bottom of pt_regs.

Suggested-by: Charlie Jenkins <charlie@...osinc.com>
Signed-off-by: Quan Zhou <zhouquan@...as.ac.cn>
---
 arch/riscv/include/asm/ptrace.h      | 7 ++++---
 arch/riscv/include/uapi/asm/ptrace.h | 2 ++
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/include/asm/ptrace.h b/arch/riscv/include/asm/ptrace.h
index b5b0adcc85c1..380cf54c1f3d 100644
--- a/arch/riscv/include/asm/ptrace.h
+++ b/arch/riscv/include/asm/ptrace.h
@@ -12,6 +12,7 @@
 
 #ifndef __ASSEMBLY__
 
+/* MAX_REG_OFFSET should match the bottom of pt_regs */
 struct pt_regs {
 	unsigned long epc;
 	unsigned long ra;
@@ -45,12 +46,12 @@ struct pt_regs {
 	unsigned long t4;
 	unsigned long t5;
 	unsigned long t6;
+	/* a0 value before the syscall */
+	unsigned long orig_a0;
 	/* Supervisor/Machine CSRs */
 	unsigned long status;
 	unsigned long badaddr;
 	unsigned long cause;
-	/* a0 value before the syscall */
-	unsigned long orig_a0;
 };
 
 #define PTRACE_SYSEMU			0x1f
@@ -64,7 +65,7 @@ struct pt_regs {
 
 #define user_mode(regs) (((regs)->status & SR_PP) == 0)
 
-#define MAX_REG_OFFSET offsetof(struct pt_regs, orig_a0)
+#define MAX_REG_OFFSET offsetof(struct pt_regs, cause)
 
 /* Helpers for working with the instruction pointer */
 static inline unsigned long instruction_pointer(struct pt_regs *regs)
diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h
index a38268b19c3d..3e37f80cb3e8 100644
--- a/arch/riscv/include/uapi/asm/ptrace.h
+++ b/arch/riscv/include/uapi/asm/ptrace.h
@@ -54,6 +54,8 @@ struct user_regs_struct {
 	unsigned long t4;
 	unsigned long t5;
 	unsigned long t6;
+	/* a0 value before the syscall */
+	unsigned long orig_a0;
 };
 
 struct __riscv_f_ext_state {
-- 
2.34.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ