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Date: Fri, 28 Jun 2024 01:25:43 +0300
From: Vladimir Oltean <olteanv@...il.com>
To: Oleksij Rempel <o.rempel@...gutronix.de>
Cc: "David S. Miller" <davem@...emloft.net>, Andrew Lunn <andrew@...n.ch>,
	Eric Dumazet <edumazet@...gle.com>,
	Florian Fainelli <f.fainelli@...il.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Woojung Huh <woojung.huh@...rochip.com>,
	Arun Ramadoss <arun.ramadoss@...rochip.com>,
	Lucas Stach <l.stach@...gutronix.de>, kernel@...gutronix.de,
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
	UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH net-next v1 2/3] net: dsa: microchip: lan937x: force
 RGMII interface into PHY mode

On Thu, Jun 27, 2024 at 02:39:10PM +0200, Oleksij Rempel wrote:
> From: Lucas Stach <l.stach@...gutronix.de>
> 
> The register manual and datasheet documentation for the LAN937x series
> disagree about the polarity of the MII mode strap. As a consequence
> there are hardware designs that have the RGMII interface strapped into
> MAC mode, which is a invalid configuration and will prevent the internal
> clock from being fed into the port TX interface.
> 
> Force the MII mode to PHY for RGMII interfaces where this is the only
> valid mode, to override the inproper strapping.
> 
> Signed-off-by: Lucas Stach <l.stach@...gutronix.de>
> Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
> ---

What's the difference between MAC mode and PHY mode with RGMII for this switch?

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