linux-kernel - Re: [PATCH v2 1/1] iommu/vt-d: Fix missed device TLB cache tag

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Message-ID: <20240627112729.rcadq6ey6bp6dios@joelS2.panther.com>
Date: Thu, 27 Jun 2024 13:27:29 +0200
From: Joel Granados <j.granados@...sung.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>
CC: Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>, Robin
	Murphy <robin.murphy@....com>, Kevin Tian <kevin.tian@...el.com>, Jason
	Gunthorpe <jgg@...pe.ca>, Jacek Lawrynowicz
	<jacek.lawrynowicz@...ux.intel.com>, <iommu@...ts.linux.dev>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/1] iommu/vt-d: Fix missed device TLB cache tag

On Thu, Jun 20, 2024 at 02:29:40PM +0800, Lu Baolu wrote:
> When a domain is attached to a device, the required cache tags are
> assigned to the domain so that the related caches can be flushed
> whenever it is needed. The device TLB cache tag is created based
> on whether the ats_enabled field of the device's iommu data is set.
> This creates an ordered dependency between cache tag assignment and
> ATS enabling.
> 
> The device TLB cache tag would not be created if device's ATS is
> enabled after the cache tag assignment. This causes devices with PCI
> ATS support to malfunction.
> 
> The ATS control is exclusively owned by the iommu driver. Hence, move
> cache_tag_assign_domain() after PCI ATS enabling to make sure that the
> device TLB cache tag is created for the domain.
> 
> Fixes: 3b1d9e2b2d68 ("iommu/vt-d: Add cache tag assignment interface")
> Signed-off-by: Lu Baolu <baolu.lu@...ux.intel.com>
> ---
>  drivers/iommu/intel/iommu.c | 20 ++++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> Change log:
> v2:
> - Reverting the order instead of adding unnecessary run-time overhead.
> 
> v1:
> - https://lore.kernel.org/linux-iommu/20240619015345.182773-1-baolu.lu@linux.intel.com/
> 
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 2e9811bf2a4e..fd11a080380c 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -2114,12 +2114,6 @@ static int dmar_domain_attach_device(struct dmar_domain *domain,
>  	if (ret)
>  		return ret;
>  
> -	ret = cache_tag_assign_domain(domain, dev, IOMMU_NO_PASID);
> -	if (ret) {
> -		domain_detach_iommu(domain, iommu);
> -		return ret;
> -	}
> -
>  	info->domain = domain;
>  	spin_lock_irqsave(&domain->lock, flags);
>  	list_add(&info->link, &domain->devices);
> @@ -2137,15 +2131,21 @@ static int dmar_domain_attach_device(struct dmar_domain *domain,
>  	else
>  		ret = intel_pasid_setup_second_level(iommu, domain, dev, IOMMU_NO_PASID);
>  
> -	if (ret) {
> -		device_block_translation(dev);
> -		return ret;
> -	}
> +	if (ret)
> +		goto out_block_translation;
>  
>  	if (sm_supported(info->iommu) || !domain_type_is_si(info->domain))
>  		iommu_enable_pci_caps(info);
>  
> +	ret = cache_tag_assign_domain(domain, dev, IOMMU_NO_PASID);
> +	if (ret)
> +		goto out_block_translation;
> +
>  	return 0;
> +
> +out_block_translation:
> +	device_block_translation(dev);
> +	return ret;
>  }
>  
>  /**
> -- 
> 2.34.1
> 

Even though this has already been applied, its good to know that it
works :)

Tested-by: Joel Granados <j.granados@...sung.com>

-- 

Joel Granados