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Message-ID: <20240627-hurry-gills-19a2496797f3@spud>
Date: Thu, 27 Jun 2024 16:51:22 +0100
From: Conor Dooley <conor@...nel.org>
To: Serge Semin <fancer.lancer@...il.com>
Cc: Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>,
Jose Abreu <Jose.Abreu@...opsys.com>,
Vladimir Oltean <olteanv@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Maxime Chevallier <maxime.chevallier@...tlin.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Sagar Cheluvegowda <quic_scheluve@...cinc.com>,
Abhishek Chauhan <quic_abchauha@...cinc.com>,
Andrew Halaney <ahalaney@...hat.com>,
Jiawen Wu <jiawenwu@...stnetic.com>,
Mengyuan Lou <mengyuanlou@...-swift.com>,
Tomer Maimon <tmaimon77@...il.com>, openbmc@...ts.ozlabs.org,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next v3 06/10] dt-bindings: net: Add Synopsys DW xPCS
bindings
On Thu, Jun 27, 2024 at 03:41:26AM +0300, Serge Semin wrote:
> + clocks:
> + description:
> + Both MCI and APB3 interfaces are supposed to be equipped with a clock
> + source connected via the clk_csr_i line.
> +
> + PCS/PMA layer can be clocked by an internal reference clock source
> + (phyN_core_refclk) or by an externally connected (phyN_pad_refclk) clock
> + generator. Both clocks can be supplied at a time.
> + minItems: 1
> + maxItems: 3
> +
> + clock-names:
> + oneOf:
> + - minItems: 1
> + items:
> + - enum: [core, pad]
> + - const: pad
> + - minItems: 1
> + items:
> + - const: pclk
> + - enum: [core, pad]
> + - const: pad
While reading this, I'm kinda struggling to map "clk_csr_i" to a clock
name. Is that pclk? And why pclk if it is connected to "clk_csr_i"?
If two interfaces are meant to be "equipped" with that clock, how come
it is optional? I'm probably missing something...
Otherwise this binding looks fine to me.
Wee bit confused,
Conor.
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