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Date: Thu, 27 Jun 2024 18:05:29 +0200
From: Jean-Michel Hautbois <jeanmichel.hautbois@...eli.org>
To: Geert Uytterhoeven <geert@...ux-m68k.org>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>, Vignesh Raghavendra <vigneshr@...com>,
Stefan Agner <stefan@...er.ch>
Cc: linux-m68k@...ts.linux-m68k.org, linux-kernel@...r.kernel.org,
linux-mtd@...ts.infradead.org,
Jean-Michel Hautbois <jeanmichel.hautbois@...eli.org>
Subject: [PATCH v2 2/2] mtd: nand: Add support for M5441x NFC
The vf610_nfc driver is also the one which should be used for the
coldfire series. Sadly, these device don't support device-tree and so we
need to do a few modifications:
- Adapt the probe to use pdata if available
- Add a new variant as there is a small part to adapt in
vf610_nfc_select_target()
- Add the corresponding missing register definitions
Tested successfully on a 54418 custom board with a raw NAND:
[ 2.640000] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xdc
[ 2.650000] nand: Micron MT29F4G08ABADAWP
[ 2.650000] nand: 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
Signed-off-by: Jean-Michel Hautbois <jeanmichel.hautbois@...eli.org>
---
drivers/mtd/nand/raw/Kconfig | 2 +-
drivers/mtd/nand/raw/vf610_nfc.c | 102 +++++++++++++++++++++++++++++----------
2 files changed, 78 insertions(+), 26 deletions(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index cbf8ae85e1ae..2ea3ee32a540 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -252,7 +252,7 @@ config MTD_NAND_FSL_UPM
config MTD_NAND_VF610_NFC
tristate "Freescale VF610/MPC5125 NAND controller"
- depends on (SOC_VF610 || COMPILE_TEST)
+ depends on (SOC_VF610 || COMPILE_TEST || M5441x)
depends on HAS_IOMEM
help
Enables support for NAND Flash Controller on some Freescale
diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index f31d23219f91..9d46b4f57f31 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -146,6 +146,7 @@
enum vf610_nfc_variant {
NFC_VFC610 = 1,
+ NFC_M54418 = 2,
};
struct vf610_nfc {
@@ -486,10 +487,24 @@ static void vf610_nfc_select_target(struct nand_chip *chip, unsigned int cs)
if (nfc->variant != NFC_VFC610)
return;
- tmp = vf610_nfc_read(nfc, NFC_ROW_ADDR);
- tmp &= ~(ROW_ADDR_CHIP_SEL_RB_MASK | ROW_ADDR_CHIP_SEL_MASK);
- tmp |= 1 << ROW_ADDR_CHIP_SEL_RB_SHIFT;
- tmp |= BIT(cs) << ROW_ADDR_CHIP_SEL_SHIFT;
+ if (nfc->variant == NFC_M54418) {
+ /*
+ * According to the Reference Manual:
+ * bit 24: Reserved, must be set (ROW_ADDR_CHIP_SEL_SHIFT)
+ * bit 25-27: Reserved, must be cleared
+ * bit 28: Reserved, must be set (ROW_ADDR_CHIP_SEL_RB_SHIFT)
+ * bit 29-31: Reserved, must be cleared
+ */
+ tmp = vf610_nfc_read(nfc, NFC_ROW_ADDR);
+ tmp &= ~(ROW_ADDR_CHIP_SEL_RB_MASK | ROW_ADDR_CHIP_SEL_MASK);
+ tmp |= 1 << ROW_ADDR_CHIP_SEL_RB_SHIFT;
+ tmp |= 1 << ROW_ADDR_CHIP_SEL_SHIFT;
+ } else {
+ tmp = vf610_nfc_read(nfc, NFC_ROW_ADDR);
+ tmp &= ~(ROW_ADDR_CHIP_SEL_RB_MASK | ROW_ADDR_CHIP_SEL_MASK);
+ tmp |= 1 << ROW_ADDR_CHIP_SEL_RB_SHIFT;
+ tmp |= BIT(cs) << ROW_ADDR_CHIP_SEL_SHIFT;
+ }
vf610_nfc_write(nfc, NFC_ROW_ADDR, tmp);
}
@@ -706,6 +721,19 @@ static const struct of_device_id vf610_nfc_dt_ids[] = {
};
MODULE_DEVICE_TABLE(of, vf610_nfc_dt_ids);
+static const struct platform_device_id vf610_nfc_id_table[] = {
+ {
+ .name = "mcf5441x-nfc",
+ .driver_data = (kernel_ulong_t)NFC_M54418,
+ }, {
+ .name = "vf610-nfc",
+ .driver_data = (kernel_ulong_t)NFC_VFC610,
+ }, {
+ /* sentinel */
+ },
+};
+MODULE_DEVICE_TABLE(platform, vf610_nfc_id_table);
+
static void vf610_nfc_preinit_controller(struct vf610_nfc *nfc)
{
vf610_nfc_clear(nfc, NFC_FLASH_CONFIG, CONFIG_16BIT);
@@ -810,7 +838,7 @@ static int vf610_nfc_probe(struct platform_device *pdev)
struct vf610_nfc *nfc;
struct mtd_info *mtd;
struct nand_chip *chip;
- struct device_node *child;
+ struct nand_chip *pdata;
int err;
int irq;
@@ -820,47 +848,70 @@ static int vf610_nfc_probe(struct platform_device *pdev)
nfc->dev = &pdev->dev;
chip = &nfc->chip;
+ pdata = dev_get_platdata(&pdev->dev);
+ if (pdata)
+ *chip = *pdata;
+
mtd = nand_to_mtd(chip);
mtd->owner = THIS_MODULE;
mtd->dev.parent = nfc->dev;
- mtd->name = DRV_NAME;
+
+ /*
+ * We keep the MTD name unchanged to avoid breaking platforms
+ * where the MTD cmdline parser is used and the bootloader
+ * has not been updated to use the new naming scheme.
+ */
+ if (!nfc->dev->of_node)
+ mtd->name = "NAND";
+ else
+ mtd->name = DRV_NAME;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return irq;
nfc->regs = devm_platform_ioremap_resource(pdev, 0);
- if (IS_ERR(nfc->regs))
+ if (IS_ERR(nfc->regs)) {
+ dev_err(nfc->dev, "Unable to map registers!\n");
return PTR_ERR(nfc->regs);
+ }
- nfc->clk = devm_clk_get_enabled(&pdev->dev, NULL);
+ nfc->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);
if (IS_ERR(nfc->clk)) {
dev_err(nfc->dev, "Unable to get and enable clock!\n");
return PTR_ERR(nfc->clk);
}
- nfc->variant = (enum vf610_nfc_variant)device_get_match_data(&pdev->dev);
- if (!nfc->variant)
- return -ENODEV;
+ if (pdev->dev.of_node) {
+ const void *data = device_get_match_data(&pdev->dev);
- for_each_available_child_of_node(nfc->dev->of_node, child) {
- if (of_device_is_compatible(child, "fsl,vf610-nfc-nandcs")) {
+ nfc->variant = (enum vf610_nfc_variant)data;
+ if (!nfc->variant) {
+ dev_err(nfc->dev, "No variant data found!\n");
+ return -ENODEV;
+ }
- if (nand_get_flash_node(chip)) {
- dev_err(nfc->dev,
- "Only one NAND chip supported!\n");
- of_node_put(child);
- return -EINVAL;
- }
+ for_each_available_child_of_node_scoped(nfc->dev->of_node, child) {
+ if (of_device_is_compatible(child, "fsl,vf610-nfc-nandcs")) {
- nand_set_flash_node(chip, child);
+ if (nand_get_flash_node(chip)) {
+ dev_err(nfc->dev,
+ "Only one NAND chip supported!\n");
+ of_node_put(child);
+ return -EINVAL;
+ }
+
+ nand_set_flash_node(chip, child);
+ }
}
- }
- if (!nand_get_flash_node(chip)) {
- dev_err(nfc->dev, "NAND chip sub-node missing!\n");
- return -ENODEV;
+ if (!nand_get_flash_node(chip)) {
+ dev_err(nfc->dev, "NAND chip sub-node missing!\n");
+ return -ENODEV;
+ }
+ } else {
+ nfc->variant = (enum vf610_nfc_variant)platform_get_device_id(pdev)->driver_data;
}
chip->options |= NAND_NO_SUBPAGE_WRITE;
@@ -937,11 +988,12 @@ static SIMPLE_DEV_PM_OPS(vf610_nfc_pm_ops, vf610_nfc_suspend, vf610_nfc_resume);
static struct platform_driver vf610_nfc_driver = {
.driver = {
.name = DRV_NAME,
- .of_match_table = vf610_nfc_dt_ids,
+ .of_match_table = of_match_ptr(vf610_nfc_dt_ids),
.pm = &vf610_nfc_pm_ops,
},
.probe = vf610_nfc_probe,
.remove_new = vf610_nfc_remove,
+ .id_table = vf610_nfc_id_table,
};
module_platform_driver(vf610_nfc_driver);
--
2.43.0
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