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Message-ID: <mhng-e131a037-69c8-423a-929d-e2f03e979ed2@palmer-ri-x1c9a>
Date: Fri, 28 Jun 2024 09:26:56 -0700 (PDT)
From: Palmer Dabbelt <palmer@...osinc.com>
To: Linus Torvalds <torvalds@...ux-foundation.org>
CC:         linux-riscv@...ts.infradead.org,        linux-kernel@...r.kernel.org
Subject: [GIT PULL] RISC-V Fixes for 6.10-rc6

The following changes since commit f2661062f16b2de5d7b6a5c42a9a5c96326b8454:

  Linux 6.10-rc5 (2024-06-23 17:08:54 -0400)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.10-rc6

for you to fetch changes up to cc2c169e34b4215f73c66a34bd292e9e1fcaa3c9:

  Merge patch "riscv: stacktrace: convert arch_stack_walk() to noinstr" (2024-06-26 07:38:02 -0700)

----------------------------------------------------------------
RISC-V Fixes for 6.10-rc6

* A fix for vector load/store instruction decoding, which could result
  in reserved vector element length encodings decoding as valid vector
  instructions.
* Instruction patching now aggressively flushes the local instruction
  cache, to avoid situations where patching functions on the flush path
  results in torn instructions being fetched.
* A fix to prevent the stack walker from showing up as part of traces.

----------------------------------------------------------------
Alexandre Ghiti (1):
      riscv: patch: Flush the icache right after patching to avoid illegal insns

Andy Chiu (1):
      riscv: stacktrace: convert arch_stack_walk() to noinstr

Jesse Taube (1):
      RISC-V: fix vector insn load/store width mask

Palmer Dabbelt (1):
      Merge patch "riscv: stacktrace: convert arch_stack_walk() to noinstr"

 arch/riscv/include/asm/insn.h  |  2 +-
 arch/riscv/kernel/ftrace.c     |  7 ++-----
 arch/riscv/kernel/patch.c      | 26 ++++++++++++++++++--------
 arch/riscv/kernel/stacktrace.c |  2 +-
 4 files changed, 22 insertions(+), 15 deletions(-)

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