linux-kernel - T113 TCON Top tinting troubleshooting

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Message-ID: <Zn8GVkpwXwhaUFno@titan>
Date: Sat, 29 Jun 2024 04:52:06 +1000
From: John Watts <contact@...kia.org>
To: linux-sunxi@...ts.linux.dev
Cc: andre.przywara@....com, Jakob L <jakobl.gm.g@...il.com>,
	"K. James" <kirby.nankivell@...il.com>,
	Paul Kocialkowski <contact@...lk.fr>,
	Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
	Jernej Skrabec <jernej.skrabec@...il.com>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
	Samuel Holland <samuel@...lland.org>,
	dri-devel@...ts.freedesktop.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: T113 TCON Top tinting troubleshooting

Hello,

On the T113 (and most likely the D1) sometimes the RGB LCD output has strange
artifacts such as:

- A blue tint
- A mostly opaque green tint
- A red tint
- A pink tint

The actual tint seems to differ between boards or chips, and has some
probability of showing up that can range from 50% to 90%.

After a week or so of troubleshooting I've managed to figure out what's
happening here, and I'm not too sure how to fix it.

It appears that the TCON Top on this chip can't mux both mixers to a shared
output. The R40 (and H6?) allows this and prioritizes the DE0 when muxing, but
on the T113 it seems to cause graphical artifacts. Disabling DE1 in the
device tree can help but doesn't solve the problem entirely.

Here's a change that tests this behaviour, it sets DE1 to output to TVE0. DE0
then outputs to LCD0 as usual. I would appreciate if anyone with this issue can
test the above workaround on their boards.
There was a previous discussion here:
https://groups.google.com/g/linux-sunxi/c/HxDBpY5HbbQ/m/mX2O2OYlCwAJ

---8<--- CUT HERE ---8<---

--- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
+++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
@@ -179,7 +179,7 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master,
 	 * At least on H6, some registers have some bits set by default
 	 * which may cause issues. Clear them here.
 	 */
-	writel(0, regs + TCON_TOP_PORT_SEL_REG);
+	writel(0x20, regs + TCON_TOP_PORT_SEL_REG);
 	writel(0, regs + TCON_TOP_GATE_SRC_REG);

 	/*

---8<--- CUT HERE ---8<---

The sunxi display code works around this issue by ensuring DE0 and DE1 never
map to the same output: If you have DE0 set to TVE0 and DE1 set to LCD0,
then tell it to set DE0 to LCD0, it will silently swap TVE0 on to DE1. 

I'm probably going to send a patch that copies this behaviour as it
should just work, but I'd be interested to see if there's anything I'm
missing.

John.