[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240628223506.1237523-3-peter.griffin@linaro.org>
Date: Fri, 28 Jun 2024 23:35:04 +0100
From: Peter Griffin <peter.griffin@...aro.org>
To: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
alim.akhtar@...sung.com,
s.nawrocki@...sung.com,
cw00.choi@...sung.com,
mturquette@...libre.com,
sboyd@...nel.org
Cc: linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org,
linux-kernel@...r.kernel.org,
tudor.ambarus@...aro.org,
andre.draszik@...aro.org,
kernel-team@...roid.com,
willmcvicker@...gle.com,
devicetree@...r.kernel.org,
linux-clk@...r.kernel.org,
Peter Griffin <peter.griffin@...aro.org>
Subject: [PATCH v2 1/3] arm64: dts: exynos: gs101: add syscon-poweroff and syscon-reboot nodes
Reboot of gs101 SoC can be handled by setting the
bit(SWRESET_SYSTEM[1]) of SYSTEM_CONFIGURATION register(PMU + 0x3a00).
Poweroff of gs101 SoC can be handled by setting bit(DATA[8]) of
PAD_CTRL_PWR_HOLD register (PMU + 0x3e9c).
Tested using "reboot" and "poweroff -p" commands.
Tested-by: Will McVicker <willmcvicker@...gle.com>
Signed-off-by: Peter Griffin <peter.griffin@...aro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index eadb8822e6d4..302c5beb224a 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -1394,6 +1394,21 @@ sysreg_apm: syscon@...204e0 {
pmu_system_controller: system-controller@...60000 {
compatible = "google,gs101-pmu", "syscon";
reg = <0x17460000 0x10000>;
+
+ poweroff: syscon-poweroff {
+ compatible = "syscon-poweroff";
+ regmap = <&pmu_system_controller>;
+ offset = <0x3e9c>; /* PAD_CTRL_PWR_HOLD */
+ mask = <0x100>; /* reset value */
+ };
+
+ reboot: syscon-reboot {
+ compatible = "syscon-reboot";
+ regmap = <&pmu_system_controller>;
+ offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
+ mask = <0x2>; /* SWRESET_SYSTEM */
+ value = <0x2>; /* reset value */
+ };
};
pinctrl_gpio_alive: pinctrl@...d0000 {
--
2.45.2.803.g4e1b14247a-goog
Powered by blists - more mailing lists