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Message-ID:
<AM6PR04MB59413C6B1A976B158808CD9788D02@AM6PR04MB5941.eurprd04.prod.outlook.com>
Date: Fri, 28 Jun 2024 00:58:38 +0000
From: Peng Fan <peng.fan@....com>
To: Frank Li <frank.li@....com>, Rob Herring <robh@...nel.org>, Krzysztof
Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Shawn Guo
<shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, Pengutronix
Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, "open list:ARM/FREESCALE IMX / MXC ARM
ARCHITECTURE" <imx@...ts.linux.dev>, "moderated list:ARM/FREESCALE IMX / MXC
ARM ARCHITECTURE" <linux-arm-kernel@...ts.infradead.org>, open list
<linux-kernel@...r.kernel.org>
CC: "imx@...ts.linux.dev" <imx@...ts.linux.dev>
Subject: RE: [PATCH 5/7] arm64: dts: imx95-19x19-evk: add flexspi and child
node
> Subject: [PATCH 5/7] arm64: dts: imx95-19x19-evk: add flexspi and
> child node
>
> Add flexspi and child flash node.
>
> Signed-off-by: Frank Li <Frank.Li@....com>
> ---
> .../boot/dts/freescale/imx95-19x19-evk.dts | 33
> +++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> index 660e623f4f964..ed8921d6217b8 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> @@ -163,6 +163,22 @@ sound-wm8962 {
> };
> };
>
> +&flexspi1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexspi1>;
> + status = "okay";
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spi-max-frequency = <200000000>;
> + spi-tx-bus-width = <8>;
> + spi-rx-bus-width = <8>;
> + };
> +};
> +
> &lpi2c4 {
> clock-frequency = <400000>;
> pinctrl-names = "default";
> @@ -336,6 +352,23 @@ &wdog3 {
> };
>
> &scmi_iomuxc {
> + pinctrl_flexspi1: flexspi1grp {
> + fsl,pins = <
> +
> IMX95_PAD_XSPI1_SS0_B__FLEXSPI1_A_SS0_B
> 0x3fe
> + IMX95_PAD_XSPI1_SS1_B__GPIO5_IO_BIT11
> 0x3fe
This gpio should be in a standalone node and put under
flash@0 as 'reset-gpios'.
Regards,
Peng.
> + IMX95_PAD_XSPI1_SCLK__FLEXSPI1_A_SCLK
> 0x3fe
> + IMX95_PAD_XSPI1_DQS__FLEXSPI1_A_DQS
> 0x3fe
> +
> IMX95_PAD_XSPI1_DATA0__FLEXSPI1_A_DATA_BIT0
> 0x3fe
> +
> IMX95_PAD_XSPI1_DATA1__FLEXSPI1_A_DATA_BIT1
> 0x3fe
> +
> IMX95_PAD_XSPI1_DATA2__FLEXSPI1_A_DATA_BIT2
> 0x3fe
> +
> IMX95_PAD_XSPI1_DATA3__FLEXSPI1_A_DATA_BIT3
> 0x3fe
> +
> IMX95_PAD_XSPI1_DATA4__FLEXSPI1_A_DATA_BIT4
> 0x3fe
> +
> IMX95_PAD_XSPI1_DATA5__FLEXSPI1_A_DATA_BIT5
> 0x3fe
> +
> IMX95_PAD_XSPI1_DATA6__FLEXSPI1_A_DATA_BIT6
> 0x3fe
> +
> IMX95_PAD_XSPI1_DATA7__FLEXSPI1_A_DATA_BIT7
> 0x3fe
> + >;
> + };
> +
> pinctrl_hp: hpgrp {
> fsl,pins = <
> IMX95_PAD_GPIO_IO11__GPIO2_IO_BIT11
> 0x31e
> --
> 2.34.1
>
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