linux-kernel - Re: [PATCH net-next v1 3/3] net: dsa: microchip: lan937x: disable VPHY output

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Date: Fri, 28 Jun 2024 10:45:24 +0200
From: Lucas Stach <l.stach@...gutronix.de>
To: Vladimir Oltean <olteanv@...il.com>, Oleksij Rempel
	 <o.rempel@...gutronix.de>
Cc: "David S. Miller" <davem@...emloft.net>, Andrew Lunn <andrew@...n.ch>, 
 Eric Dumazet <edumazet@...gle.com>, Florian Fainelli
 <f.fainelli@...il.com>, Jakub Kicinski <kuba@...nel.org>,  Paolo Abeni
 <pabeni@...hat.com>, Woojung Huh <woojung.huh@...rochip.com>, Arun Ramadoss
 <arun.ramadoss@...rochip.com>, kernel@...gutronix.de, 
 linux-kernel@...r.kernel.org, netdev@...r.kernel.org, 
 UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH net-next v1 3/3] net: dsa: microchip: lan937x: disable
 VPHY output

Am Freitag, dem 28.06.2024 um 01:38 +0300 schrieb Vladimir Oltean:
> On Thu, Jun 27, 2024 at 02:39:11PM +0200, Oleksij Rempel wrote:
> > The VPHY is a compatibility functionality to be able to attach network
> > drivers without fixed-link support to the switch, which generally
> > should not be needed with linux network drivers.
> 
> Sorry, I don't have much to base my judgement upon. I did search for the
> "VPHY" string and found it to be accessed in the dev_ops->r_phy() and
> dev_ops->w_phy() implementations, suggesting that it is more than just
> that? These methods are used for accessing the registers of the embedded
> PHYs for user ports. I don't see what is the connection with RGMII on
> the CPU port.

There is a bit of a mixup with the names here. The VPHY (as in virtual
PHY) is a emulated PHY register space accessible via MDIO to allow
operating systems that don't support the concept of direct MAC to MAC
connections to work with the switch. However, it is buggy and the
emulated auto-negotiation does the wrong thing for RGMII interfaces. As
this part isn't needed for Linux we disable it with this patch, or to
be precise the VPHY itself isn't disabled, but rather the result of the
VPHY state machine isn't allowed to override explicit link
configurations in other registers anymore.

The VPHY used by the driver to access the registers of real PHYs is
described in the datasheet like this:

"Direct access to the PHY registers via SPI requires a reduced SPI_CLK
frequency. This is due to the latency incurred from clock crossings
from the internal bus and into the PHY. To avoid a degradation of
SPI_CLK, an indirect mechanism has been added to the VPHY for accessing
the PHY registers via Indirect Address Register, Indirect Data
Register, and Indirect Control Register."

This mechanism is located in the VPHY register range, but otherwise has
nothing to do with the VPHY state machine and is also not affected by
this patch.

Regards,
Lucas