linux-kernel - Re: [PATCH v2 07/12] i2c: riic: Define individual arrays to describe the register offsets

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Message-ID: <CAMuHMdXJ8eKLzMqCPR2ewS9gr_m5OQPneETPMC-rOOmW+--f5A@mail.gmail.com>
Date: Fri, 28 Jun 2024 11:13:42 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: claudiu beznea <claudiu.beznea@...on.dev>
Cc: Biju Das <biju.das.jz@...renesas.com>, Chris Brandt <Chris.Brandt@...esas.com>, 
	"andi.shyti@...nel.org" <andi.shyti@...nel.org>, "robh@...nel.org" <robh@...nel.org>, 
	"krzk+dt@...nel.org" <krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>, 
	"geert+renesas@...der.be" <geert+renesas@...der.be>, "magnus.damm@...il.com" <magnus.damm@...il.com>, 
	"mturquette@...libre.com" <mturquette@...libre.com>, "sboyd@...nel.org" <sboyd@...nel.org>, 
	"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>, 
	"wsa+renesas@...g-engineering.com" <wsa+renesas@...g-engineering.com>, 
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>, 
	"linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>, 
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, 
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, 
	"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>, 
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH v2 07/12] i2c: riic: Define individual arrays to describe
 the register offsets

Hi Claudiu,

On Fri, Jun 28, 2024 at 10:12 AM claudiu beznea
<claudiu.beznea@...on.dev> wrote:
> On 28.06.2024 11:09, Biju Das wrote:
> >> -----Original Message-----
> >> From: claudiu beznea <claudiu.beznea@...on.dev>
> >> Sent: Friday, June 28, 2024 9:03 AM
> >> Subject: Re: [PATCH v2 07/12] i2c: riic: Define individual arrays to describe the register offsets
> >>
> >>
> >>
> >> On 28.06.2024 10:55, Biju Das wrote:
> >>> Hi Claudiu,
> >>>
> >>>> -----Original Message-----
> >>>> From: claudiu beznea <claudiu.beznea@...on.dev>
> >>>> Sent: Friday, June 28, 2024 8:32 AM
> >>>> Subject: Re: [PATCH v2 07/12] i2c: riic: Define individual arrays to
> >>>> describe the register offsets
> >>>>
> >>>> Hi, Biju,
> >>>>
> >>>> On 28.06.2024 08:59, Biju Das wrote:
> >>>>> Hi Claudiu,
> >>>>>
> >>>>>> -----Original Message-----
> >>>>>> From: Claudiu <claudiu.beznea@...on.dev>
> >>>>>> Sent: Tuesday, June 25, 2024 1:14 PM
> >>>>>> Subject: [PATCH v2 07/12] i2c: riic: Define individual arrays to
> >>>>>> describe the register offsets
> >>>>>>
> >>>>>> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> >>>>>>
> >>>>>> Define individual arrays to describe the register offsets. In this
> >>>>>> way we can describe different IP variants that share the same
> >>>>>> register offsets but have differences in other characteristics.
> >>>>>> Commit prepares for the addition
> >>>> of fast mode plus.
> >>>>>>
> >>>>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> >>>>>> ---
> >>>>>>
> >>>>>> Changes in v2:
> >>>>>> - none
> >>>>>>
> >>>>>>  drivers/i2c/busses/i2c-riic.c | 58
> >>>>>> +++++++++++++++++++----------------
> >>>>>>  1 file changed, 31 insertions(+), 27 deletions(-)
> >>>>>>
> >>>>>> diff --git a/drivers/i2c/busses/i2c-riic.c
> >>>>>> b/drivers/i2c/busses/i2c-riic.c index
> >>>>>> 9fe007609076..8ffbead95492 100644
> >>>>>> --- a/drivers/i2c/busses/i2c-riic.c
> >>>>>> +++ b/drivers/i2c/busses/i2c-riic.c
> >>>>>> @@ -91,7 +91,7 @@ enum riic_reg_list {  };
> >>>>>>
> >>>>>>  struct riic_of_data {
> >>>>>> -        u8 regs[RIIC_REG_END];
> >>>>>> +        const u8 *regs;
> >>>>>
> >>>>>
> >>>>> Since you are touching this part, can we drop struct and Use u8* as
> >>>>> device_data instead?
> >>>>
> >>>> Patch 09/12 "i2c: riic: Add support for fast mode plus" adds a new member to struct
> >> riic_of_data.
> >>>> That new member is needed to differentiate b/w hardware versions
> >>>> supporting fast mode plus based on compatible.
> >>>
> >>> Are we sure RZ/A does not support fast mode plus?
> >>
> >> From commit description of patch 09/12:
> >>
> >> Fast mode plus is available on most of the IP variants that RIIC driver is working with. The
> >> exception is (according to HW manuals of the SoCs where this IP is available) the Renesas RZ/A1H.
> >> For this, patch introduces the struct riic_of_data::fast_mode_plus.
> >>
> >> I checked the manuals of all the SoCs where this driver is used.
> >>
> >> I haven't checked the H/W manual?
> >>
> >> On the manual I've downloaded from Renesas web site the FMPE bit of RIICnFER is not available on
> >> RZ/A1H.
> >
> > I just found RZ/A2M manual, it supports FMP and register layout looks similar to RZ/G2L.
>
> I introduced struct riic_of_data::fast_mode_plus because of RZ/A1H.

Do you need to check for that?

The ICFER_FMPE bit won't be set unless the user specifies the FM+
clock-frequency.  Setting clock-frequency beyond Fast Mode on RZ/A1H
would be very wrong.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds