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Message-Id: <20240628131021.177866-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Fri, 28 Jun 2024 14:10:17 +0100
From: Prabhakar <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>,
	linux-clk@...r.kernel.org
Cc: linux-kernel@...r.kernel.org,
	linux-renesas-soc@...r.kernel.org,
	Prabhakar <prabhakar.csengg@...il.com>,
	Biju Das <biju.das.jz@...renesas.com>,
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: [PATCH 0/4] clk: renesas: rzg2l-cpg: Refactor and simplify clock registration

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>

Hi,

This patch series aims to refactor and simplify the clock registration
code in the Renesas RZ/G2L CPG (Clock Pulse Generator) driver. The
changes enhance consistency, simplify function signatures, and remove
redundant parameters, thereby improving maintainability and reducing
potential for errors.

Cheers,
Prabhakar

Lad Prabhakar (4):
  clk: renesas: rzg2l-cpg: Use devres API to register clocks
  clk: renesas: rzg2l-cpg: Simplify rzg3s_cpg_div_clk_register function
  clk: renesas: rzg2l-cpg: Remove unused base pointer from
    rzg2l_cpg_sd_mux_clk_register
  clk: renesas: rzg2l-cpg: Refactor to use priv for clks and base in
    clock register functions

 drivers/clk/renesas/rzg2l-cpg.c | 53 +++++++++++++++++----------------
 1 file changed, 27 insertions(+), 26 deletions(-)

-- 
2.34.1


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