linux-kernel - [PATCH] arm64: dts: rockchip: Add optional GPU OPP voltage ranges to RK356x SoC dtsi

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Message-Id: <446399362bd2dbeeaecd8351f68811165429749a.1719637113.git.dsimic@manjaro.org>
Date: Sat, 29 Jun 2024 07:11:24 +0200
From: Dragan Simic <dsimic@...jaro.org>
To: linux-rockchip@...ts.infradead.org
Cc: heiko@...ech.de,
	linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	linux-kernel@...r.kernel.org,
	Diederik de Haas <didi.debian@...ow.org>,
	Jonas Karlman <jonas@...boo.se>
Subject: [PATCH] arm64: dts: rockchip: Add optional GPU OPP voltage ranges to RK356x SoC dtsi

Add optional support for voltage ranges to the GPU OPPs defined in the SoC
dtsi for RK356x.  These voltage ranges are useful for RK356x-based boards that
are designed to use the same power supply for the GPU and NPU portions of the
SoC, which is described further in the following documents from Rockchip:

  - Rockchip RK3566 Hardware Design Guide, version 1.1.0, page 37
  - Rockchip RK3568 Hardware Design Guide, version 1.2, page 78

The values for the exact GPU OPP voltages and the lower limits for the GPU
OPP voltage ranges differ from the values found in the vendor kernel source
(cf. downstream commit f8b9431ee38e ("arm64: dts: rockchip: rk3568: support
adjust opp-table by otp")). [1][2]  However, our values have served us well
so far, so let's keep them for now, until we actually start supporting the
CPU and GPU binning, together with the related voltage adjustments.

No functional changes are introduced, which was validated by decompiling and
comparing all affected dtb files before and after these changes.

[1] https://github.com/rockchip-linux/kernel/commit/f8b9431ee38ed561650be7092ab93f564598daa9
[2] https://raw.githubusercontent.com/rockchip-linux/kernel/f8b9431ee38ed561650be7092ab93f564598daa9/arch/arm64/boot/dts/rockchip/rk3568.dtsi

Suggested-by: Diederik de Haas <didi.debian@...ow.org>
Helped-by: Jonas Karlman <jonas@...boo.se>
Signed-off-by: Dragan Simic <dsimic@...jaro.org>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 38 ++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index d8543b5557ee..febda473dc38 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1,5 +1,11 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
+ * The defined GPU OPPs optionally support voltage ranges, which are useful
+ * for RK356x-based boards that are designed to use the same power supply for
+ * the GPU and NPU portions of the SoC.  To use GPU OPPs with voltage ranges
+ * on such boards, define the RK356X_GPU_NPU_SHARED_REGULATOR macro in the
+ * descendant board dts(i) file, before including this file.
+ *
  * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
  */
 
@@ -193,6 +199,7 @@ scmi_clk: protocol@14 {
 	gpu_opp_table: opp-table-1 {
 		compatible = "operating-points-v2";
 
+#ifndef RK356X_GPU_NPU_SHARED_REGULATOR
 		opp-200000000 {
 			opp-hz = /bits/ 64 <200000000>;
 			opp-microvolt = <825000>;
@@ -222,6 +229,37 @@ opp-800000000 {
 			opp-hz = /bits/ 64 <800000000>;
 			opp-microvolt = <1000000>;
 		};
+#else
+		opp-200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <825000 825000 1000000>;
+		};
+
+		opp-300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <825000 825000 1000000>;
+		};
+
+		opp-400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <825000 825000 1000000>;
+		};
+
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <825000 825000 1000000>;
+		};
+
+		opp-700000000 {
+			opp-hz = /bits/ 64 <700000000>;
+			opp-microvolt = <900000 900000 1000000>;
+		};
+
+		opp-800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1000000 1000000 1000000>;
+		};
+#endif /* RK356X_GPU_NPU_SHARED_REGULATOR */
 	};
 
 	hdmi_sound: hdmi-sound {