[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <5e6f2c81-f33b-4a66-b12e-91c88ae2307d@suse.com>
Date: Sat, 29 Jun 2024 18:50:08 +0200
From: Jürgen Groß <jgross@...e.com>
To: Tom Lendacky <thomas.lendacky@....com>,
Ashish Kalra <Ashish.Kalra@....com>, dave.hansen@...ux.intel.com,
luto@...nel.org, peterz@...radead.org, tglx@...utronix.de, mingo@...hat.com,
bp@...en8.de
Cc: x86@...nel.org, hpa@...or.com, kirill.shutemov@...ux.intel.com,
rick.p.edgecombe@...el.com, mhklinux@...look.com, peterx@...hat.com,
linux-kernel@...r.kernel.org, linux-coco@...ts.linux.dev, jroedel@...e.de
Subject: Re: [PATCH] x86/mm: fix lookup_address() to handle physical memory
holes in direct mapping
On 29.06.24 17:16, Tom Lendacky wrote:
> On 6/29/24 05:20, Jürgen Groß wrote:
>> On 28.06.24 22:52, Ashish Kalra wrote:
>>> From: Ashish Kalra <ashish.kalra@....com>
>>>
>>> lookup_address_in_pgd_attr() at pte level it is simply returning
>>> pte_offset_kernel() and there does not seem to be a check for
>>> returning NULL if pte_none().
>>>
>>> Fix lookup_address_in_pgd_attr() to add check for pte_none()
>>> after pte_offset_kernel() and return NULL if it is true.
>>
>> Please have a look at the comment above lookup_address(). You should not
>> break the documented behavior without verifying that no caller is relying
>> on the current behavior. If this is fine, please update the comment.
>
> This brings up a point from my other reply. The comment says that it
> returns "the effective NX and RW bits of all page table levels", but in
> fact NX and RW are not updated for the PTE. Since the comment says all
> page table levels, shouldn't they be updated with the PTE values, too?
Hmm, the comment could need some clarifications.
It returns the effective NX and RW bits of the levels above the PTE. Reason is
that the function is used in case the NX/RW bits of a PTE are updated, so the
PTE settings are not always really important.
Juergen
Powered by blists - more mailing lists