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Message-ID: <8df86f0a1ba3d44a6be3c5a5291eaf9cec4a7638.camel@mediatek.com>
Date: Mon, 1 Jul 2024 02:35:38 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
Shawn Sung (宋孝謙) <Shawn.Sung@...iatek.com>,
"airlied@...il.com" <airlied@...il.com>, "daniel@...ll.ch" <daniel@...ll.ch>,
"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
"angelogioacchino.delregno@...labora.com"
<angelogioacchino.delregno@...labora.com>, "matthias.bgg@...il.com"
<matthias.bgg@...il.com>
CC: "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 3/5] drm/mediatek: Support "Pre-multiplied" blending in
OVL
Hi, Shawn:
On Thu, 2024-06-20 at 01:27 +0800, Hsiao Chien Sung via B4 Relay wrote:
>
> External email : Please do not click links or open attachments until you have verified the sender or the content.
> From: Hsiao Chien Sung <shawn.sung@...iatek.com>
>
> Support "Pre-multiplied" alpha blending mode on in OVL.
> Before this patch, only the "coverage" mode is supported.
Reviewed-by: CK Hu <ck.hu@...iatek.com>
>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@...iatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +++++++++++++++++++++++++-------
> 1 file changed, 25 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index ad9228fc4dd9..8e9aae36a289 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -52,8 +52,12 @@
> #define GMC_THRESHOLD_HIGH((1 << GMC_THRESHOLD_BITS) / 4)
> #define GMC_THRESHOLD_LOW((1 << GMC_THRESHOLD_BITS) / 8)
>
> +#define OVL_CON_CLRFMT_MANBIT(23)
> #define OVL_CON_BYTE_SWAPBIT(24)
> -#define OVL_CON_MTX_YUV_TO_RGB(6 << 16)
> +
> +/* OVL_CON_RGB_SWAP works only if OVL_CON_CLRFMT_MAN is enabled */
> +#define OVL_CON_RGB_SWAPBIT(25)
> +
> #define OVL_CON_CLRFMT_RGB(1 << 12)
> #define OVL_CON_CLRFMT_ARGB8888(2 << 12)
> #define OVL_CON_CLRFMT_RGBA8888(3 << 12)
> @@ -61,6 +65,11 @@
> #define OVL_CON_CLRFMT_BGRA8888(OVL_CON_CLRFMT_ARGB8888 | OVL_CON_BYTE_SWAP)
> #define OVL_CON_CLRFMT_UYVY(4 << 12)
> #define OVL_CON_CLRFMT_YUYV(5 << 12)
> +#define OVL_CON_MTX_YUV_TO_RGB(6 << 16)
> +#define OVL_CON_CLRFMT_PARGB8888 ((3 << 12) | OVL_CON_CLRFMT_MAN)
> +#define OVL_CON_CLRFMT_PABGR8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_RGB_SWAP)
> +#define OVL_CON_CLRFMT_PBGRA8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_BYTE_SWAP)
> +#define OVL_CON_CLRFMT_PRGBA8888 (OVL_CON_CLRFMT_PABGR8888 | OVL_CON_BYTE_SWAP)
> #define OVL_CON_CLRFMT_RGB565(ovl)((ovl)->data->fmt_rgb565_is_0 ? \
> 0 : OVL_CON_CLRFMT_RGB)
> #define OVL_CON_CLRFMT_RGB888(ovl)((ovl)->data->fmt_rgb565_is_0 ? \
> @@ -382,7 +391,8 @@ void mtk_ovl_layer_off(struct device *dev, unsigned int idx,
> DISP_REG_OVL_RDMA_CTRL(idx));
> }
>
> -static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt)
> +static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt,
> + unsigned int blend_mode)
> {
> /* The return value in switch "MEM_MODE_INPUT_FORMAT_XXX"
> * is defined in mediatek HW data sheet.
> @@ -403,22 +413,30 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt)
> case DRM_FORMAT_RGBA8888:
> case DRM_FORMAT_RGBX1010102:
> case DRM_FORMAT_RGBA1010102:
> -return OVL_CON_CLRFMT_RGBA8888;
> +return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> + OVL_CON_CLRFMT_RGBA8888 :
> + OVL_CON_CLRFMT_PRGBA8888;
> case DRM_FORMAT_BGRX8888:
> case DRM_FORMAT_BGRA8888:
> case DRM_FORMAT_BGRX1010102:
> case DRM_FORMAT_BGRA1010102:
> -return OVL_CON_CLRFMT_BGRA8888;
> +return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> + OVL_CON_CLRFMT_BGRA8888 :
> + OVL_CON_CLRFMT_PBGRA8888;
> case DRM_FORMAT_XRGB8888:
> case DRM_FORMAT_ARGB8888:
> case DRM_FORMAT_XRGB2101010:
> case DRM_FORMAT_ARGB2101010:
> -return OVL_CON_CLRFMT_ARGB8888;
> +return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> + OVL_CON_CLRFMT_ARGB8888 :
> + OVL_CON_CLRFMT_PARGB8888;
> case DRM_FORMAT_XBGR8888:
> case DRM_FORMAT_ABGR8888:
> case DRM_FORMAT_XBGR2101010:
> case DRM_FORMAT_ABGR2101010:
> -return OVL_CON_CLRFMT_ABGR8888;
> +return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> + OVL_CON_CLRFMT_ABGR8888 :
> + OVL_CON_CLRFMT_PABGR8888;
> case DRM_FORMAT_UYVY:
> return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB;
> case DRM_FORMAT_YUYV:
> @@ -458,7 +476,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
> return;
> }
>
> -con = ovl_fmt_convert(ovl, fmt);
> +con = ovl_fmt_convert(ovl, fmt, blend_mode);
> if (state->base.fb) {
> con |= OVL_CON_AEN;
> con |= state->base.alpha & OVL_CON_ALPHA;
>
> --
> Git-146)
>
>
>
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