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Date: Mon, 1 Jul 2024 18:07:09 +0100
From: Mark Rutland <mark.rutland@....com>
To: "Rob Herring (Arm)" <robh@...nel.org>
Cc: Russell King <linux@...linux.org.uk>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Will Deacon <will@...nel.org>, Marc Zyngier <maz@...nel.org>,
Oliver Upton <oliver.upton@...ux.dev>,
James Morse <james.morse@....com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Zenghui Yu <yuzenghui@...wei.com>,
Catalin Marinas <catalin.marinas@....com>,
James Clark <james.clark@....com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org, kvmarm@...ts.linux.dev
Subject: Re: [PATCH v2 10/12] arm64: perf/kvm: Use a common PMU cycle counter
define
On Wed, Jun 26, 2024 at 04:32:34PM -0600, Rob Herring (Arm) wrote:
> The PMUv3 and KVM code each have a define for the PMU cycle counter
> index. Move KVM's define to a shared location and use it for PMUv3
> driver.
>
> Signed-off-by: Rob Herring (Arm) <robh@...nel.org>
> ---
> v2:
> - Move ARMV8_PMU_CYCLE_IDX to linux/perf/arm_pmuv3.h
> ---
> arch/arm64/kvm/sys_regs.c | 1 +
> drivers/perf/arm_pmuv3.c | 19 +++++++------------
> include/kvm/arm_pmu.h | 1 -
> include/linux/perf/arm_pmuv3.h | 3 +++
> 4 files changed, 11 insertions(+), 13 deletions(-)
Acked-by: Mark Rutland <mark.rutland@....com>
Mark.
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index f8b5db48ea8a..22393ae7ce14 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -18,6 +18,7 @@
> #include <linux/printk.h>
> #include <linux/uaccess.h>
>
> +#include <asm/arm_pmuv3.h>
> #include <asm/cacheflush.h>
> #include <asm/cputype.h>
> #include <asm/debug-monitors.h>
> diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c
> index f771242168f1..f58dff49ea7d 100644
> --- a/drivers/perf/arm_pmuv3.c
> +++ b/drivers/perf/arm_pmuv3.c
> @@ -451,11 +451,6 @@ static const struct attribute_group armv8_pmuv3_caps_attr_group = {
> .attrs = armv8_pmuv3_caps_attrs,
> };
>
> -/*
> - * Perf Events' indices
> - */
> -#define ARMV8_IDX_CYCLE_COUNTER 31
> -
> /*
> * We unconditionally enable ARMv8.5-PMU long event counter support
> * (64-bit events) where supported. Indicate if this arm_pmu has long
> @@ -574,7 +569,7 @@ static u64 armv8pmu_read_counter(struct perf_event *event)
> int idx = hwc->idx;
> u64 value;
>
> - if (idx == ARMV8_IDX_CYCLE_COUNTER)
> + if (idx == ARMV8_PMU_CYCLE_IDX)
> value = read_pmccntr();
> else
> value = armv8pmu_read_hw_counter(event);
> @@ -607,7 +602,7 @@ static void armv8pmu_write_counter(struct perf_event *event, u64 value)
>
> value = armv8pmu_bias_long_counter(event, value);
>
> - if (idx == ARMV8_IDX_CYCLE_COUNTER)
> + if (idx == ARMV8_PMU_CYCLE_IDX)
> write_pmccntr(value);
> else
> armv8pmu_write_hw_counter(event, value);
> @@ -644,7 +639,7 @@ static void armv8pmu_write_event_type(struct perf_event *event)
> armv8pmu_write_evtype(idx - 1, hwc->config_base);
> armv8pmu_write_evtype(idx, chain_evt);
> } else {
> - if (idx == ARMV8_IDX_CYCLE_COUNTER)
> + if (idx == ARMV8_PMU_CYCLE_IDX)
> write_pmccfiltr(hwc->config_base);
> else
> armv8pmu_write_evtype(idx, hwc->config_base);
> @@ -772,7 +767,7 @@ static void armv8pmu_enable_user_access(struct arm_pmu *cpu_pmu)
> /* Clear any unused counters to avoid leaking their contents */
> for_each_andnot_bit(i, cpu_pmu->cntr_mask, cpuc->used_mask,
> ARMPMU_MAX_HWEVENTS) {
> - if (i == ARMV8_IDX_CYCLE_COUNTER)
> + if (i == ARMV8_PMU_CYCLE_IDX)
> write_pmccntr(0);
> else
> armv8pmu_write_evcntr(i, 0);
> @@ -933,8 +928,8 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc,
> /* Always prefer to place a cycle counter into the cycle counter. */
> if ((evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) &&
> !armv8pmu_event_get_threshold(&event->attr)) {
> - if (!test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask))
> - return ARMV8_IDX_CYCLE_COUNTER;
> + if (!test_and_set_bit(ARMV8_PMU_CYCLE_IDX, cpuc->used_mask))
> + return ARMV8_PMU_CYCLE_IDX;
> else if (armv8pmu_event_is_64bit(event) &&
> armv8pmu_event_want_user_access(event) &&
> !armv8pmu_has_long_event(cpu_pmu))
> @@ -1196,7 +1191,7 @@ static void __armv8pmu_probe_pmu(void *info)
> 0, FIELD_GET(ARMV8_PMU_PMCR_N, armv8pmu_pmcr_read()));
>
> /* Add the CPU cycles counter */
> - set_bit(ARMV8_IDX_CYCLE_COUNTER, cpu_pmu->cntr_mask);
> + set_bit(ARMV8_PMU_CYCLE_IDX, cpu_pmu->cntr_mask);
>
> pmceid[0] = pmceid_raw[0] = read_pmceid0();
> pmceid[1] = pmceid_raw[1] = read_pmceid1();
> diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h
> index 334d7c5503cf..871067fb2616 100644
> --- a/include/kvm/arm_pmu.h
> +++ b/include/kvm/arm_pmu.h
> @@ -10,7 +10,6 @@
> #include <linux/perf_event.h>
> #include <linux/perf/arm_pmuv3.h>
>
> -#define ARMV8_PMU_CYCLE_IDX (ARMV8_PMU_MAX_COUNTERS - 1)
>
> #if IS_ENABLED(CONFIG_HW_PERF_EVENTS) && IS_ENABLED(CONFIG_KVM)
> struct kvm_pmc {
> diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h
> index 792b8e10b72a..f4ec76f725a3 100644
> --- a/include/linux/perf/arm_pmuv3.h
> +++ b/include/linux/perf/arm_pmuv3.h
> @@ -9,6 +9,9 @@
> #define ARMV8_PMU_MAX_GENERAL_COUNTERS 31
> #define ARMV8_PMU_MAX_COUNTERS 32
>
> +#define ARMV8_PMU_CYCLE_IDX 31
> +
> +
> /*
> * Common architectural and microarchitectural event numbers.
> */
>
> --
> 2.43.0
>
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