linux-kernel - Re: [PATCH v6 6/7] iio: adc: Add support for AD4000

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Message-ID: <ZoLxLgpy44S38nSe@debian-BULLSEYE-live-builder-AMD64>
Date: Mon, 1 Jul 2024 15:10:54 -0300
From: Marcelo Schmitt <marcelo.schmitt1@...il.com>
To: Jonathan Cameron <jic23@...nel.org>
Cc: Marcelo Schmitt <marcelo.schmitt@...log.com>, broonie@...nel.org,
	lars@...afoo.de, Michael.Hennerich@...log.com, robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
	nuno.sa@...log.com, dlechner@...libre.com, corbet@....net,
	linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
	linux-spi@...r.kernel.org, linux-doc@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 6/7] iio: adc: Add support for AD4000

On 06/30, Jonathan Cameron wrote:
> On Sat, 29 Jun 2024 16:06:59 -0300
> Marcelo Schmitt <marcelo.schmitt@...log.com> wrote:
> 
> > Add support for AD4000 series of low noise, low power, high speed,
> > successive approximation register (SAR) ADCs.
> > 
> > Signed-off-by: Marcelo Schmitt <marcelo.schmitt@...log.com>
> 
> Hi Marcelo
> 
> A few comments inline. However, the spi_w8r8 etc can easily be a follow up
> optimization patch (if you agree it's a good improvement) and the
> other changes are so trivial I could tweak whilst applying.
> 
...
> > +	/*
> > +	 * The gain is stored as a fraction of 1000 and, as we need to
> > +	 * divide vref_mv by the gain, we invert the gain/1000 fraction.
> > +	 * Also multiply by an extra MILLI to preserve precision.
> > +	 * Thus, we have MILLI * MILLI equals MICRO as fraction numerator.
> > +	 */
> > +	val = mult_frac(st->vref_mv, MICRO, st->gain_milli);
> 
> If you are rolling a v7 for other reasons, stick some line breaks in here!
> It's a bit of a mass of text that is hard for my eyes to parse!
> 
Ack

...

> 
> > +static int ad4000_read_reg(struct ad4000_state *st, unsigned int *val)
> > +{
> > +	struct spi_transfer t = {
> > +		.tx_buf = st->tx_buf,
> > +		.rx_buf = st->rx_buf,
> > +		.len = 2,
> > +	};
> > +	int ret;
> > +
> > +	st->tx_buf[0] = AD4000_READ_COMMAND;
> > +	ret = spi_sync_transfer(st->spi, &t, 1);
> > +	if (ret < 0)
> > +		return ret;
> > +
> > +	*val = st->rx_buf[1];
> > +	return ret;
> 
> I'd be tempted to do
> 
> 	ssize_t ret;
> 
> 	ret = spi_w8r8(AD4000_READ_COMMAND);
> 	if (ret < 0)
> 		return ret;
> 	*val = ret;
> 	
> 	return 0;
> 
I tried this when working on v6. Only difference was I had declared ret as int.
Then reg values were not read correctly with spi_w8r8().
I'm either missing something or reg access must be 16-bit transfer.
Datasheet sais:
"The AD4000/AD4004/AD4008 configuration register is read from and written to
with a 16-bit SPI instruction."
Yet, besides possible delay between first and last 8 SCLK pulses, I don't see
any transfer level differences between current and spi_w8r8() versions.

> 
> 
...
> > +			ret = ad4000_write_reg(st, reg_val);
> > +			if (ret < 0)
> > +				return ret;
> > +
> > +			st->span_comp = span_comp_en;
> > +			return ret;
> 
> If you are spinning for another reason, make it clear this is always good.
> The spi_write() never returns positive so current code is correct but I had
> to go check which this would have avoided.
> 
> 			return 0;

Ack
> 
> If nothing else comes up, I'll probably tweak whilst applying.
> 
> J
> 
> > +		}
> > +		unreachable();
> > +	default:
> > +		return -EINVAL;
> > +	}
> > +}
>