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Message-ID: <3b164525-f797-478a-a75c-1c2bd83086af@intel.com>
Date: Wed, 3 Jul 2024 07:49:48 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
Nikolay Borisov <nik.borisov@...e.com>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>, linux-coco@...ts.linux.dev,
linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCHv5 3/4] x86/tdx: Dynamically disable SEPT violations from
causing #VEs
On 7/3/24 06:04, Kirill A. Shutemov wrote:
>>> -/* TDCS fields. To be used by TDG.VM.WR and TDG.VM.RD module calls */
>>> +/* TDX TD-Scope Metadata. To be used by TDG.VM.WR and TDG.VM.RD */
>>> +#define TDCS_CONFIG_FLAGS 0x1110000300000016
>> 0x9110000300000016
>>> +#define TDCS_TD_CTLS 0x11104800000017
>> 0x9110000300000017
> Setting bit 63 in these field id is regression in new TDX spec and TDX
> module. It is going to be fixed in next version. Both versions of field
> ids are going to be valid.
I kinda never liked the big ol' magic numbers approach here. But could
we please introduce some helpers here?
Then we'll end up with something like this (if the 0x111 can't be
decomposed):
#define _TDCS_CMD(c) ((0x1110UL << 48) | (c))
#define TDCS_CONFIG_FLAGS _TDCS_CMD(0x16)
#define TDCS_TD_CTLS _TDCS_CMD(0x17)
Then when folks change their mind about what should be in the TDX spec,
we have one place to go fix it up in addition to making this all more
readable.
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