linux-kernel - Re: [PATCH 3/3] riscv: dts: sophgo: Add SARADC configuration

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Message-ID: <daa482a5-ced2-48f1-b47b-fcefca127648@kernel.org>
Date: Wed, 3 Jul 2024 07:09:34 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Thomas Bonnefille <thomas.bonnefille@...tlin.com>,
 Jonathan Cameron <jic23@...nel.org>, Lars-Peter Clausen <lars@...afoo.de>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Chen Wang <unicorn_wang@...look.com>,
 Inochi Amaoto <inochiama@...look.com>,
 Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
 <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
 Miquèl Raynal <miquel.raynal@...tlin.com>,
 linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 3/3] riscv: dts: sophgo: Add SARADC configuration

On 02/07/2024 13:52, Thomas Bonnefille wrote:
> Adds SARADC nodes for the common Successive Approximation Analog to
> Digital Converter used in Sophgo SoC.
> This patch adds nodes for the two SARADCs presents on the board, one in
> the Active domain and the other in the No-Die domain.

You are duplicating the first sentence or this does not make sense...

> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 7247c7c3013c..0b996aa7fa31 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -309,5 +309,19 @@ clint: timer@...00000 {
>  			reg = <0x74000000 0x10000>;
>  			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
>  		};
> +
> +		saradc_active: adc@...0000 {

Please look at DTS coding style about ordering of nodes.

Best regards,
Krzysztof