linux-kernel - Re: [PATCH v3 10/11] riscv: defconfig: enable SpacemiT SoC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <6be424e0-c746-48e8-94fe-8d5d2eb6cc03@rivosinc.com>
Date: Wed, 3 Jul 2024 20:48:25 -0400
From: Jesse Taube <jesse@...osinc.com>
To: Yixun Lan <dlan@...too.org>
Cc: Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
 Albert Ou <aou@...s.berkeley.edu>,
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Yangyu Chen <cyy@...self.name>, Anup Patel <anup@...infault.org>,
 Daniel Lezcano <daniel.lezcano@...aro.org>, linux-kernel@...r.kernel.org,
 linux-riscv@...ts.infradead.org, Samuel Holland <samuel.holland@...ive.com>,
 Lubomir Rintel <lkundrak@...sk>, devicetree@...r.kernel.org,
 Palmer Dabbelt <palmer@...belt.com>, linux-serial@...r.kernel.org,
 Paul Walmsley <paul.walmsley@...ive.com>,
 Inochi Amaoto <inochiama@...look.com>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Jiri Slaby <jirislaby@...nel.org>,
 Thomas Gleixner <tglx@...utronix.de>,
 Meng Zhang <zhangmeng.kevin@...cemit.com>
Subject: Re: [PATCH v3 10/11] riscv: defconfig: enable SpacemiT SoC



On 7/3/24 10:55, Yixun Lan wrote:
> From: Yangyu Chen <cyy@...self.name>
> 
> Enable SpacemiT SoC config in defconfig to allow the default upstream
> kernel to boot on Banana Pi BPI-F3 board.
> 
> Signed-off-by: Yangyu Chen <cyy@...self.name>
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
> Signed-off-by: Yixun Lan <dlan@...too.org>
Tested-by: Jesse Taube <jesse@...osinc.com>

Thanks,
Jesse Taube
> ---
>   arch/riscv/configs/defconfig | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 12dc8c73a8acf..5287ae81bbb78 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -29,6 +29,7 @@ CONFIG_ARCH_MICROCHIP=y
>   CONFIG_ARCH_RENESAS=y
>   CONFIG_ARCH_SIFIVE=y
>   CONFIG_ARCH_SOPHGO=y
> +CONFIG_ARCH_SPACEMIT=y
>   CONFIG_SOC_STARFIVE=y
>   CONFIG_ARCH_SUNXI=y
>   CONFIG_ARCH_THEAD=y
>